From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
richard.henderson@linaro.org, max.chou@sifive.com,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v3 1/5] trans_rvv.c.inc: mark_vs_dirty() before stores
Date: Tue, 20 Feb 2024 16:26:03 -0300 [thread overview]
Message-ID: <20240220192607.141880-2-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20240220192607.141880-1-dbarboza@ventanamicro.com>
While discussing a problem with how we're (not) setting vstart_eq_zero
Richard had the following to say w.r.t the conditional mark_vs_dirty()
calls on load/store functions [1]:
"I think it's required to have stores set dirty unconditionally, before
the operation.
Consider a store that traps on the 2nd element, leaving vstart = 2, and
exiting to the main loop via exception. The exception enters the kernel
page fault handler. The kernel may need to fault in the page for the
process, and in the meantime task switch.
If vs dirty is not already set, the kernel won't know to save vector
state on task switch."
Do a mark_vs_dirty() before store operations. Keep the mark_vs_dirty()
call at the end for loads - the function is a no-op if mstatus_vs is
already set to EXT_STATUS_DIRTY so there's no hurt in store functions
calling it twice.
[1] https://lore.kernel.org/qemu-riscv/72c7503b-0f43-44b8-aa82-fbafed2aac0c@linaro.org/
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/insn_trans/trans_rvv.c.inc | 29 +++++++++++++++----------
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
index 9e101ab434..2065e9064e 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -636,12 +636,13 @@ static bool ldst_us_trans(uint32_t vd, uint32_t rs1, uint32_t data,
tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd));
tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0));
- fn(dest, mask, base, tcg_env, desc);
-
- if (!is_store) {
+ if (is_store) {
mark_vs_dirty(s);
}
+ fn(dest, mask, base, tcg_env, desc);
+
+ mark_vs_dirty(s);
gen_set_label(over);
return true;
}
@@ -797,12 +798,13 @@ static bool ldst_stride_trans(uint32_t vd, uint32_t rs1, uint32_t rs2,
tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd));
tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0));
- fn(dest, mask, base, stride, tcg_env, desc);
-
- if (!is_store) {
+ if (is_store) {
mark_vs_dirty(s);
}
+ fn(dest, mask, base, stride, tcg_env, desc);
+
+ mark_vs_dirty(s);
gen_set_label(over);
return true;
}
@@ -904,12 +906,13 @@ static bool ldst_index_trans(uint32_t vd, uint32_t rs1, uint32_t vs2,
tcg_gen_addi_ptr(index, tcg_env, vreg_ofs(s, vs2));
tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0));
- fn(dest, mask, base, index, tcg_env, desc);
-
- if (!is_store) {
+ if (is_store) {
mark_vs_dirty(s);
}
+ fn(dest, mask, base, index, tcg_env, desc);
+
+ mark_vs_dirty(s);
gen_set_label(over);
return true;
}
@@ -1102,11 +1105,13 @@ static bool ldst_whole_trans(uint32_t vd, uint32_t rs1, uint32_t nf,
base = get_gpr(s, rs1, EXT_NONE);
tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd));
- fn(dest, base, tcg_env, desc);
-
- if (!is_store) {
+ if (is_store) {
mark_vs_dirty(s);
}
+
+ fn(dest, base, tcg_env, desc);
+
+ mark_vs_dirty(s);
gen_set_label(over);
return true;
--
2.43.2
next prev parent reply other threads:[~2024-02-20 19:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-20 19:26 [PATCH v3 0/5] riscv: set vstart_eq_zero on mark_vs_dirty Daniel Henrique Barboza
2024-02-20 19:26 ` Daniel Henrique Barboza [this message]
2024-02-20 20:17 ` [PATCH v3 1/5] trans_rvv.c.inc: mark_vs_dirty() before stores Richard Henderson
2024-02-20 21:10 ` Daniel Henrique Barboza
2024-02-20 19:26 ` [PATCH v3 2/5] target/riscv: remove 'over' brconds from vector trans Daniel Henrique Barboza
2024-02-20 20:19 ` Richard Henderson
2024-02-20 19:26 ` [PATCH v3 3/5] target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX() Daniel Henrique Barboza
2024-02-20 20:20 ` Richard Henderson
2024-02-20 19:26 ` [PATCH v3 4/5] trans_rvv.c.inc: remove redundant mark_vs_dirty() calls Daniel Henrique Barboza
2024-02-20 20:20 ` Richard Henderson
2024-02-20 19:26 ` [PATCH v3 5/5] target/riscv: Clear vstart_qe_zero flag Daniel Henrique Barboza
2024-02-20 20:22 ` Richard Henderson
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