From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
richard.henderson@linaro.org,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH for-9.1 v3 0/2] target/riscv: set tval in breakpoints
Date: Tue, 16 Apr 2024 20:04:35 -0300 [thread overview]
Message-ID: <20240416230437.1869024-1-dbarboza@ventanamicro.com> (raw)
Hi,
This new version has a change suggested by Richard in v2. No other
changes made.
Changes from v2:
- patch 2:
- use tcg_constant_tl() instead of loading a temp and doing a
movi_tl()
- v2 link: https://lore.kernel.org/qemu-riscv/20240416194132.1843699-1-dbarboza@ventanamicro.com/
Daniel Henrique Barboza (2):
target/riscv/debug: set tval=pc in breakpoint exceptions
trans_privileged.c.inc: set (m|s)tval on ebreak breakpoint
target/riscv/cpu_helper.c | 1 +
target/riscv/debug.c | 3 +++
target/riscv/insn_trans/trans_privileged.c.inc | 2 ++
3 files changed, 6 insertions(+)
--
2.44.0
next reply other threads:[~2024-04-16 23:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-16 23:04 Daniel Henrique Barboza [this message]
2024-04-16 23:04 ` [PATCH for-9.1 v3 1/2] target/riscv/debug: set tval=pc in breakpoint exceptions Daniel Henrique Barboza
2024-04-26 1:39 ` LIU Zhiwei
2024-04-29 3:08 ` Alistair Francis
2024-04-16 23:04 ` [PATCH for-9.1 v3 2/2] trans_privileged.c.inc: set (m|s)tval on ebreak breakpoint Daniel Henrique Barboza
2024-04-17 2:40 ` Richard Henderson
2024-04-26 1:40 ` LIU Zhiwei
2024-04-29 3:09 ` Alistair Francis
2024-04-29 3:16 ` [PATCH for-9.1 v3 0/2] target/riscv: set tval in breakpoints Alistair Francis
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