From: "Clément Léger" <cleger@rivosinc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
qemu-riscv@nongnu.org
Cc: "Clément Léger" <cleger@rivosinc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
qemu-devel@nongnu.org
Subject: [PATCH] target/riscv: change RISCV_EXCP_SEMIHOST exception number to 63
Date: Mon, 22 Apr 2024 15:58:36 +0200 [thread overview]
Message-ID: <20240422135840.1959967-1-cleger@rivosinc.com> (raw)
The current semihost exception number (16) is a reserved number (range
[16-17]). The upcoming double trap specification uses that number for
the double trap exception. Since the privileged spec (Table 22) defines
ranges for custom uses change the semihosting exception number to 63
which belongs to the range [48-63] in order to avoid any future
collisions with reserved exception.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
---
target/riscv/cpu_bits.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index fc2068ee4d..74318a925c 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -670,11 +670,11 @@ typedef enum RISCVException {
RISCV_EXCP_INST_PAGE_FAULT = 0xc, /* since: priv-1.10.0 */
RISCV_EXCP_LOAD_PAGE_FAULT = 0xd, /* since: priv-1.10.0 */
RISCV_EXCP_STORE_PAGE_FAULT = 0xf, /* since: priv-1.10.0 */
- RISCV_EXCP_SEMIHOST = 0x10,
RISCV_EXCP_INST_GUEST_PAGE_FAULT = 0x14,
RISCV_EXCP_LOAD_GUEST_ACCESS_FAULT = 0x15,
RISCV_EXCP_VIRT_INSTRUCTION_FAULT = 0x16,
RISCV_EXCP_STORE_GUEST_AMO_ACCESS_FAULT = 0x17,
+ RISCV_EXCP_SEMIHOST = 0x3f,
} RISCVException;
#define RISCV_EXCP_INT_FLAG 0x80000000
--
2.43.0
next reply other threads:[~2024-04-22 13:59 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-22 13:58 Clément Léger [this message]
2024-04-22 17:45 ` [PATCH] target/riscv: change RISCV_EXCP_SEMIHOST exception number to 63 Daniel Henrique Barboza
2024-04-22 19:44 ` Richard Henderson
2024-04-22 19:58 ` Daniel Henrique Barboza
2024-04-23 12:48 ` Clément Léger
2024-04-29 2:46 ` Alistair Francis
2024-04-29 2:52 ` Alistair Francis
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