From: Alistair Francis <alistair23@gmail.com>
To: Huang Tao <eric.huang@linux.alibaba.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
zhiwei_liu@linux.alibaba.com, dbarboza@ventanamicro.com,
liwei1518@gmail.com, bin.meng@windriver.com,
alistair.francis@wdc.com, palmer@dabbelt.com,
Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH v3] target/riscv: Fix the element agnostic function problem
Date: Mon, 29 Apr 2024 13:39:04 +1000 [thread overview]
Message-ID: <CAKmqyKPJqU=dOsXX=kOPnbJtbOHw63_V_XXkfMFc+26Uh+1MYg@mail.gmail.com> (raw)
In-Reply-To: <20240325021654.6594-1-eric.huang@linux.alibaba.com>
On Mon, Mar 25, 2024 at 12:18 PM Huang Tao <eric.huang@linux.alibaba.com> wrote:
>
> In RVV and vcrypto instructions, the masked and tail elements are set to 1s
> using vext_set_elems_1s function if the vma/vta bit is set. It is the element
> agnostic policy.
>
> However, this function can't deal the big endian situation. This patch fixes
> the problem by adding handling of such case.
>
> Signed-off-by: Huang Tao <eric.huang@linux.alibaba.com>
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> Changes in v3:
> - use "if (HOST_BIG_ENDIAN)" instead of "#if HOST_BIG_ENDIAN"
>
> Changes in v2:
> - Keep the api of vext_set_elems_1s
> - Reduce the number of patches.
> ---
> target/riscv/vector_internals.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/target/riscv/vector_internals.c b/target/riscv/vector_internals.c
> index 12f5964fbb..36635a1138 100644
> --- a/target/riscv/vector_internals.c
> +++ b/target/riscv/vector_internals.c
> @@ -30,6 +30,28 @@ void vext_set_elems_1s(void *base, uint32_t is_agnostic, uint32_t cnt,
> if (tot - cnt == 0) {
> return ;
> }
> +
> + if (HOST_BIG_ENDIAN) {
> + /*
> + * Deal the situation when the elements are insdie
> + * only one uint64 block including setting the
> + * masked-off element.
> + */
> + if (((tot - 1) ^ cnt) < 8) {
> + memset(base + H1(tot - 1), -1, tot - cnt);
> + return;
> + }
> + /*
> + * Otherwise, at least cross two uint64_t blocks.
> + * Set first unaligned block.
> + */
> + if (cnt % 8 != 0) {
> + uint32_t j = ROUND_UP(cnt, 8);
> + memset(base + H1(j - 1), -1, j - cnt);
> + cnt = j;
> + }
> + /* Set other 64bit aligend blocks */
> + }
> memset(base + cnt, -1, tot - cnt);
> }
>
> --
> 2.41.0
>
>
prev parent reply other threads:[~2024-04-29 3:39 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-25 2:16 [PATCH v3] target/riscv: Fix the element agnostic function problem Huang Tao
2024-04-02 7:01 ` Huang Tao
2024-04-29 3:39 ` Alistair Francis [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAKmqyKPJqU=dOsXX=kOPnbJtbOHw63_V_XXkfMFc+26Uh+1MYg@mail.gmail.com' \
--to=alistair23@gmail.com \
--cc=alistair.francis@wdc.com \
--cc=bin.meng@windriver.com \
--cc=dbarboza@ventanamicro.com \
--cc=eric.huang@linux.alibaba.com \
--cc=liwei1518@gmail.com \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).