From: Roger Quadros <rogerq@ti.com>
To: <kishon@ti.com>, <tony@atomide.com>
Cc: <nm@ti.com>, <nsekhar@ti.com>, <balbi@ti.com>,
<grygorii.strashko@ti.com>, <linux-kernel@vger.kernel.org>,
<linux-omap@vger.kernel.org>, Roger Quadros <rogerq@ti.com>
Subject: [PATCH 3/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY
Date: Tue, 12 May 2015 19:07:08 +0300 [thread overview]
Message-ID: <1431446828-5473-4-git-send-email-rogerq@ti.com> (raw)
In-Reply-To: <1431446828-5473-1-git-send-email-rogerq@ti.com>
This register is required to be passed to the SATA PHY driver
to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index f03a091..260f300 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1135,6 +1135,7 @@
ctrl-module = <&omap_control_sata>;
clocks = <&sys_clkin1>, <&sata_ref_clk>;
clock-names = "sysclk", "refclk";
+ syscon-pllreset = <&dra7_ctrl_core 0x3fc>;
#phy-cells = <0>;
};
--
2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@ti.com>
To: kishon@ti.com, tony@atomide.com
Cc: nm@ti.com, nsekhar@ti.com, balbi@ti.com,
grygorii.strashko@ti.com, linux-kernel@vger.kernel.org,
linux-omap@vger.kernel.org, Roger Quadros <rogerq@ti.com>
Subject: [PATCH 3/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY
Date: Tue, 12 May 2015 19:07:08 +0300 [thread overview]
Message-ID: <1431446828-5473-4-git-send-email-rogerq@ti.com> (raw)
In-Reply-To: <1431446828-5473-1-git-send-email-rogerq@ti.com>
This register is required to be passed to the SATA PHY driver
to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index f03a091..260f300 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1135,6 +1135,7 @@
ctrl-module = <&omap_control_sata>;
clocks = <&sys_clkin1>, <&sata_ref_clk>;
clock-names = "sysclk", "refclk";
+ syscon-pllreset = <&dra7_ctrl_core 0x3fc>;
#phy-cells = <0>;
};
--
2.1.4
next prev parent reply other threads:[~2015-05-12 16:07 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-12 16:07 [PATCH 0/3] phy: ti-pipe3: dra7: sata: allow suspend to RAM Roger Quadros
2015-05-12 16:07 ` Roger Quadros
2015-05-12 16:07 ` [PATCH 1/3] phy: ti-pipe3: fix suspend Roger Quadros
2015-05-12 16:07 ` Roger Quadros
2015-05-20 13:04 ` Kishon Vijay Abraham I
2015-05-20 13:04 ` Kishon Vijay Abraham I
2015-05-20 13:48 ` Roger Quadros
2015-05-20 13:48 ` Roger Quadros
2015-05-12 16:07 ` [PATCH 2/3] phy: ti-pipe3: i783 workaround for SATA lockup after dpll unlock/relock Roger Quadros
2015-05-12 16:07 ` Roger Quadros
2015-05-20 13:19 ` Kishon Vijay Abraham I
2015-05-20 13:19 ` Kishon Vijay Abraham I
2015-05-20 13:47 ` Roger Quadros
2015-05-20 13:47 ` Roger Quadros
2015-05-22 11:34 ` Kishon Vijay Abraham I
2015-05-22 11:34 ` Kishon Vijay Abraham I
2015-05-22 13:58 ` Roger Quadros
2015-05-22 13:58 ` Roger Quadros
2015-05-23 7:22 ` Kishon Vijay Abraham I
2015-05-23 7:22 ` Kishon Vijay Abraham I
2015-05-26 14:20 ` Roger Quadros
2015-05-26 14:20 ` Roger Quadros
2015-06-02 8:17 ` Roger Quadros
2015-06-02 8:17 ` Roger Quadros
2015-05-12 16:07 ` Roger Quadros [this message]
2015-05-12 16:07 ` [PATCH 3/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY Roger Quadros
2015-07-14 10:34 ` Tony Lindgren
2015-07-14 10:39 ` Roger Quadros
2015-07-14 10:39 ` Roger Quadros
-- strict thread matches above, loose matches on Subject: below --
2015-08-04 16:47 [GIT PULL 0/3] phy: for 4.2 -rc Kishon Vijay Abraham I
2015-08-04 16:47 ` [PATCH 3/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY Kishon Vijay Abraham I
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