From: Peter Griffin <peter.griffin@linaro.org>
To: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com,
maxime.coquelin@st.com, patrice.chotard@st.com
Cc: peter.griffin@linaro.org, lee.jones@linaro.org,
devicetree@vger.kernel.org
Subject: [PATCH 11/11] ARM: STi: STiH407: Add spi default pinctrl groups.
Date: Fri, 11 Sep 2015 18:06:34 +0100 [thread overview]
Message-ID: <1441991194-11948-12-git-send-email-peter.griffin@linaro.org> (raw)
In-Reply-To: <1441991194-11948-1-git-send-email-peter.griffin@linaro.org>
Now we have default pinconfig groups for each SPI
controller ensure it is used by the SPI controller
node.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
arch/arm/boot/dts/stih407-family.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 838b812..94a2fec 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -381,6 +381,8 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
status = "disabled";
};
@@ -391,6 +393,8 @@
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi2_default>;
status = "disabled";
};
@@ -401,6 +405,8 @@
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi3_default>;
status = "disabled";
};
@@ -411,6 +417,8 @@
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi4_default>;
status = "disabled";
};
@@ -422,6 +430,8 @@
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi10_default>;
status = "disabled";
};
@@ -432,6 +442,8 @@
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi11_default>;
status = "disabled";
};
@@ -442,6 +454,8 @@
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi12_default>;
status = "disabled";
};
--
1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: Peter Griffin <peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
srinivas.kandagatla-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
maxime.coquelin-qxv4g6HH51o@public.gmane.org,
patrice.chotard-qxv4g6HH51o@public.gmane.org
Cc: peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 11/11] ARM: STi: STiH407: Add spi default pinctrl groups.
Date: Fri, 11 Sep 2015 18:06:34 +0100 [thread overview]
Message-ID: <1441991194-11948-12-git-send-email-peter.griffin@linaro.org> (raw)
In-Reply-To: <1441991194-11948-1-git-send-email-peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Now we have default pinconfig groups for each SPI
controller ensure it is used by the SPI controller
node.
Signed-off-by: Peter Griffin <peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
arch/arm/boot/dts/stih407-family.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 838b812..94a2fec 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -381,6 +381,8 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
status = "disabled";
};
@@ -391,6 +393,8 @@
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi2_default>;
status = "disabled";
};
@@ -401,6 +405,8 @@
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi3_default>;
status = "disabled";
};
@@ -411,6 +417,8 @@
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi4_default>;
status = "disabled";
};
@@ -422,6 +430,8 @@
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi10_default>;
status = "disabled";
};
@@ -432,6 +442,8 @@
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi11_default>;
status = "disabled";
};
@@ -442,6 +454,8 @@
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi12_default>;
status = "disabled";
};
--
1.9.1
--
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WARNING: multiple messages have this Message-ID (diff)
From: peter.griffin@linaro.org (Peter Griffin)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 11/11] ARM: STi: STiH407: Add spi default pinctrl groups.
Date: Fri, 11 Sep 2015 18:06:34 +0100 [thread overview]
Message-ID: <1441991194-11948-12-git-send-email-peter.griffin@linaro.org> (raw)
In-Reply-To: <1441991194-11948-1-git-send-email-peter.griffin@linaro.org>
Now we have default pinconfig groups for each SPI
controller ensure it is used by the SPI controller
node.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
arch/arm/boot/dts/stih407-family.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 838b812..94a2fec 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -381,6 +381,8 @@
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
status = "disabled";
};
@@ -391,6 +393,8 @@
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi2_default>;
status = "disabled";
};
@@ -401,6 +405,8 @@
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi3_default>;
status = "disabled";
};
@@ -411,6 +417,8 @@
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi4_default>;
status = "disabled";
};
@@ -422,6 +430,8 @@
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi10_default>;
status = "disabled";
};
@@ -432,6 +442,8 @@
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi11_default>;
status = "disabled";
};
@@ -442,6 +454,8 @@
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_sysin>;
clock-names = "ssc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi12_default>;
status = "disabled";
};
--
1.9.1
next prev parent reply other threads:[~2015-09-11 17:07 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-11 17:06 [PATCH 00/11] ARM: STi: STiH407: Pinctrl updates Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:06 ` [PATCH 01/11] ARM: STi: DT: STiH407: Add a cec0 pin definition Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 18:03 ` Lee Jones
2015-09-11 18:03 ` Lee Jones
2015-09-11 18:03 ` Lee Jones
2015-09-11 17:06 ` [PATCH 02/11] ARM: STi: DT: STiH407: Add i2c3 alternate pin configs Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 18:02 ` Lee Jones
2015-09-11 18:02 ` Lee Jones
2015-09-11 18:02 ` Lee Jones
2015-09-11 17:06 ` [PATCH 03/11] ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 18:02 ` Lee Jones
2015-09-11 18:02 ` Lee Jones
2015-09-11 17:06 ` [PATCH 04/11] ARM: DT: STiH407: Add serial3 pinctrl configuration Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 18:01 ` Lee Jones
2015-09-11 18:01 ` Lee Jones
2015-09-11 17:06 ` [PATCH 05/11] ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 18:01 ` Lee Jones
2015-09-11 18:01 ` Lee Jones
2015-09-11 17:06 ` [PATCH 06/11] ARM: DT: STiH407: Add NAND flash controller pin configuration Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 18:01 ` Lee Jones
2015-09-11 18:01 ` Lee Jones
2015-09-11 18:01 ` Lee Jones
2015-09-11 17:06 ` [PATCH 07/11] ARM: DT: STiH407: Add systrace " Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 18:00 ` Lee Jones
2015-09-11 18:00 ` Lee Jones
2015-09-11 17:06 ` [PATCH 08/11] ARM: DT: STiH407: Add SD pinctrl config for mmc0 controller Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 18:00 ` Lee Jones
2015-09-11 18:00 ` Lee Jones
2015-09-11 17:06 ` [PATCH 09/11] ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:57 ` Lee Jones
2015-09-11 17:57 ` Lee Jones
2015-09-11 17:06 ` [PATCH 10/11] ARM: DT: STiH407: Add RMII pinctrl support Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:57 ` Lee Jones
2015-09-11 17:57 ` Lee Jones
2015-09-11 17:06 ` Peter Griffin [this message]
2015-09-11 17:06 ` [PATCH 11/11] ARM: STi: STiH407: Add spi default pinctrl groups Peter Griffin
2015-09-11 17:06 ` Peter Griffin
2015-09-11 17:56 ` Lee Jones
2015-09-11 17:56 ` Lee Jones
2015-09-14 12:32 ` [PATCH 00/11] ARM: STi: STiH407: Pinctrl updates Patrice Chotard
2015-09-14 12:32 ` Patrice Chotard
2015-09-14 12:32 ` Patrice Chotard
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