From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 00/24] target-arm queue
Date: Mon, 14 Sep 2015 14:52:47 +0100 [thread overview]
Message-ID: <1442238791-30255-1-git-send-email-peter.maydell@linaro.org> (raw)
More target-arm patches from various people.
-- PMM
The following changes since commit 2b750d9d261bda7f75b39dfc1e1e5f22502929d5:
Merge remote-tracking branch 'remotes/aurel/tags/pull-sh4-next-20150913' into staging (2015-09-14 10:46:38 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150914
for you to fetch changes up to f0d574d63f4603ec431f16ad535a555bf7548b94:
target-arm: Add VMPIDR_EL2 (2015-09-14 14:39:51 +0100)
----------------------------------------------------------------
target-arm queue:
* fix GIC region size in xlnx-zynqmp
* xlnx-zynqmp: Remove unnecessary brackets
* improve A64 generated TCG code
* add GPIO devices to i.MX25 and i.MX31
* more missing pieces for EL2 support
----------------------------------------------------------------
Alistair Francis (1):
xlnx-zynqmp: Remove unnecessary brackets around error messages
Edgar E. Iglesias (8):
hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefully
target-arm: Add VTCR_EL2
target-arm: Add VTTBR_EL2
target-arm: Suppress TBI for S2 translations
target-arm: Suppress EPD for S2, EL2 and EL3 translations
target-arm: Add VPIDR_EL2
target-arm: Break out mpidr_read_val()
target-arm: Add VMPIDR_EL2
Jean-Christophe Dubois (3):
i.MX: Add GPIO device
i.MX: Add GPIO devices to i.MX31 SOC
i.MX: Add GPIO devices to i.MX25 SOC
Nathan Rossi (1):
arm: xlnx-zynqmp: Fix up GIC region size
Richard Henderson (11):
target-arm: Share all common TCG temporaries
target-arm: Introduce DisasCompare
target-arm: Handle always condition codes within arm_test_cc
target-arm: Use setcond and movcond for csel
target-arm: Implement ccmp branchless
target-arm: Implement fcsel with movcond
target-arm: Recognize SXTB, SXTH, SXTW, ASR
target-arm: Recognize UXTB, UXTH, LSR, LSL
target-arm: Eliminate unnecessary zero-extend in disas_bitfield
target-arm: Recognize ROR
target-arm: Use tcg_gen_extrh_i64_i32
hw/arm/fsl-imx25.c | 29 ++++
hw/arm/fsl-imx31.c | 30 ++++
hw/arm/xlnx-zynqmp.c | 10 +-
hw/cpu/a15mpcore.c | 2 +-
hw/cpu/a9mpcore.c | 2 +-
hw/gpio/Makefile.objs | 1 +
hw/gpio/imx_gpio.c | 340 +++++++++++++++++++++++++++++++++++++++++++
include/hw/arm/fsl-imx25.h | 15 ++
include/hw/arm/fsl-imx31.h | 12 ++
include/hw/arm/xlnx-zynqmp.h | 2 +-
include/hw/gpio/imx_gpio.h | 62 ++++++++
target-arm/cpu.h | 4 +
target-arm/helper.c | 158 ++++++++++++++++++--
target-arm/translate-a64.c | 340 +++++++++++++++++++++++++------------------
target-arm/translate.c | 134 ++++++++++-------
target-arm/translate.h | 17 +++
16 files changed, 949 insertions(+), 209 deletions(-)
create mode 100644 hw/gpio/imx_gpio.c
create mode 100644 include/hw/gpio/imx_gpio.h
next reply other threads:[~2015-09-14 13:53 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-14 13:52 Peter Maydell [this message]
2015-09-14 13:52 ` [Qemu-devel] [PULL 01/24] arm: xlnx-zynqmp: Fix up GIC region size Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 02/24] xlnx-zynqmp: Remove unnecessary brackets around error messages Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 03/24] target-arm: Share all common TCG temporaries Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 04/24] target-arm: Introduce DisasCompare Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 05/24] target-arm: Handle always condition codes within arm_test_cc Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 06/24] target-arm: Use setcond and movcond for csel Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 07/24] target-arm: Implement ccmp branchless Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 08/24] target-arm: Implement fcsel with movcond Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 09/24] target-arm: Recognize SXTB, SXTH, SXTW, ASR Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 10/24] target-arm: Recognize UXTB, UXTH, LSR, LSL Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 11/24] target-arm: Eliminate unnecessary zero-extend in disas_bitfield Peter Maydell
2015-09-14 13:52 ` [Qemu-devel] [PULL 12/24] target-arm: Recognize ROR Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 13/24] target-arm: Use tcg_gen_extrh_i64_i32 Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 14/24] i.MX: Add GPIO device Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 15/24] i.MX: Add GPIO devices to i.MX31 SOC Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 16/24] i.MX: Add GPIO devices to i.MX25 SOC Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 17/24] hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props gracefully Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 18/24] target-arm: Add VTCR_EL2 Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 19/24] target-arm: Add VTTBR_EL2 Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 20/24] target-arm: Suppress TBI for S2 translations Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 21/24] target-arm: Suppress EPD for S2, EL2 and EL3 translations Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 22/24] target-arm: Add VPIDR_EL2 Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 23/24] target-arm: Break out mpidr_read_val() Peter Maydell
2015-09-14 13:53 ` [Qemu-devel] [PULL 24/24] target-arm: Add VMPIDR_EL2 Peter Maydell
2015-09-14 15:12 ` [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2017-04-20 16:40 Peter Maydell
2017-04-20 17:30 ` Peter Maydell
2018-01-16 13:33 Peter Maydell
2018-01-16 15:44 ` Peter Maydell
2018-05-04 17:15 Peter Maydell
2018-05-04 17:58 ` Peter Maydell
2018-05-06 16:00 ` Auger Eric
2018-05-04 17:55 Peter Maydell
2018-05-08 9:50 ` Peter Maydell
2019-06-17 14:33 Peter Maydell
2019-06-17 15:41 ` Peter Maydell
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