From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 01/24] hw/arm/boot: take Linux/arm64 TEXT_OFFSET header field into account
Date: Thu, 20 Apr 2017 17:40:47 +0100 [thread overview]
Message-ID: <1492706470-10921-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1492706470-10921-1-git-send-email-peter.maydell@linaro.org>
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
The arm64 boot protocol stipulates that the kernel must be loaded
TEXT_OFFSET bytes beyond a 2 MB aligned base address, where TEXT_OFFSET
could be any 4 KB multiple between 0 and 2 MB, and whose value can be
found in the header of the Image file.
So after attempts to load the arm64 kernel image as an ELF file or as a
U-Boot image have failed (both of which have their own way of specifying
the load offset), try to determine the TEXT_OFFSET from the image after
loading it but before mapping it as a ROM mapping into the guest address
space.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1489414630-21609-1-git-send-email-ard.biesheuvel@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/boot.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++++----------
1 file changed, 53 insertions(+), 11 deletions(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index ff621e4..c2720c8 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -31,6 +31,9 @@
#define KERNEL_LOAD_ADDR 0x00010000
#define KERNEL64_LOAD_ADDR 0x00080000
+#define ARM64_TEXT_OFFSET_OFFSET 8
+#define ARM64_MAGIC_OFFSET 56
+
typedef enum {
FIXUP_NONE = 0, /* do nothing */
FIXUP_TERMINATOR, /* end of insns */
@@ -768,6 +771,49 @@ static uint64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
return ret;
}
+static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base,
+ hwaddr *entry)
+{
+ hwaddr kernel_load_offset = KERNEL64_LOAD_ADDR;
+ uint8_t *buffer;
+ int size;
+
+ /* On aarch64, it's the bootloader's job to uncompress the kernel. */
+ size = load_image_gzipped_buffer(filename, LOAD_IMAGE_MAX_GUNZIP_BYTES,
+ &buffer);
+
+ if (size < 0) {
+ gsize len;
+
+ /* Load as raw file otherwise */
+ if (!g_file_get_contents(filename, (char **)&buffer, &len, NULL)) {
+ return -1;
+ }
+ size = len;
+ }
+
+ /* check the arm64 magic header value -- very old kernels may not have it */
+ if (memcmp(buffer + ARM64_MAGIC_OFFSET, "ARM\x64", 4) == 0) {
+ uint64_t hdrvals[2];
+
+ /* The arm64 Image header has text_offset and image_size fields at 8 and
+ * 16 bytes into the Image header, respectively. The text_offset field
+ * is only valid if the image_size is non-zero.
+ */
+ memcpy(&hdrvals, buffer + ARM64_TEXT_OFFSET_OFFSET, sizeof(hdrvals));
+ if (hdrvals[1] != 0) {
+ kernel_load_offset = le64_to_cpu(hdrvals[0]);
+ }
+ }
+
+ *entry = mem_base + kernel_load_offset;
+ rom_add_blob_fixed(filename, buffer, size, *entry);
+
+ g_free(buffer);
+
+ return size;
+}
+
static void arm_load_kernel_notify(Notifier *notifier, void *data)
{
CPUState *cs;
@@ -776,7 +822,7 @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)
int is_linux = 0;
uint64_t elf_entry, elf_low_addr, elf_high_addr;
int elf_machine;
- hwaddr entry, kernel_load_offset;
+ hwaddr entry;
static const ARMInsnFixup *primary_loader;
ArmLoadKernelNotifier *n = DO_UPCAST(ArmLoadKernelNotifier,
notifier, notifier);
@@ -841,14 +887,12 @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
primary_loader = bootloader_aarch64;
- kernel_load_offset = KERNEL64_LOAD_ADDR;
elf_machine = EM_AARCH64;
} else {
primary_loader = bootloader;
if (!info->write_board_setup) {
primary_loader += BOOTLOADER_NO_BOARD_SETUP_OFFSET;
}
- kernel_load_offset = KERNEL_LOAD_ADDR;
elf_machine = EM_ARM;
}
@@ -900,17 +944,15 @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)
kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
&is_linux, NULL, NULL);
}
- /* On aarch64, it's the bootloader's job to uncompress the kernel. */
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) {
- entry = info->loader_start + kernel_load_offset;
- kernel_size = load_image_gzipped(info->kernel_filename, entry,
- info->ram_size - kernel_load_offset);
+ kernel_size = load_aarch64_image(info->kernel_filename,
+ info->loader_start, &entry);
is_linux = 1;
- }
- if (kernel_size < 0) {
- entry = info->loader_start + kernel_load_offset;
+ } else if (kernel_size < 0) {
+ /* 32-bit ARM */
+ entry = info->loader_start + KERNEL_LOAD_ADDR;
kernel_size = load_image_targphys(info->kernel_filename, entry,
- info->ram_size - kernel_load_offset);
+ info->ram_size - KERNEL_LOAD_ADDR);
is_linux = 1;
}
if (kernel_size < 0) {
--
2.7.4
next prev parent reply other threads:[~2017-04-20 16:41 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-20 16:40 [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
2017-04-20 16:40 ` Peter Maydell [this message]
2017-04-20 16:40 ` [Qemu-devel] [PULL 02/24] hw/arm/exynos: Convert fprintf to qemu_log_mask/error_report Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 03/24] hw/char/exynos4210_uart: Constify static array and few arguments Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 04/24] hw/misc/exynos4210_pmu: Reorder local variables for readability Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 05/24] target/arm: Add missing entries to excnames[] for log strings Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 06/24] arm: Move excnames[] array into arm_log_exceptions() Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 07/24] target/arm: Add assertion about FSC format for syndrome registers Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 08/24] stellaris: Don't hw_error() on bad register accesses Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 09/24] arm/kvm: Remove trailing newlines from error_report() Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 10/24] hw/arm: Qomify pxa2xx.c Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 11/24] cadence_gem: Read the correct queue descriptor Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 12/24] cadence_gem: Correct the multi-queue can rx logic Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 13/24] cadence_gem: Correct the interupt logic Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 14/24] cadence_gem: Make the revision a property Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 15/24] xlnx-zynqmp: Set the Cadence GEM revision Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 16/24] arm: Don't implement BXJ on M-profile CPUs Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 17/24] arm: Thumb shift operations should not permit interworking branches Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 18/24] arm: Factor out "generate right kind of step exception" Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 19/24] arm: Move gen_set_condexec() and gen_set_pc_im() up in the file Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 20/24] arm: Move condition-failed codepath generation out of if() Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 21/24] arm: Abstract out "are we singlestepping" test to utility function Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 22/24] arm: Track M profile handler mode state in TB flags Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 23/24] arm: Implement M profile exception return properly Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 24/24] arm: Remove workarounds for old M-profile exception return implementation Peter Maydell
2017-04-20 17:30 ` [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
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