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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 06/24] arm: Move excnames[] array into arm_log_exceptions()
Date: Thu, 20 Apr 2017 17:40:52 +0100	[thread overview]
Message-ID: <1492706470-10921-7-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1492706470-10921-1-git-send-email-peter.maydell@linaro.org>

The excnames[] array is defined in internals.h because we used
to use it from two different source files for handling logging
of AArch32 and AArch64 exception entry. Refactoring means that
it's now used only in arm_log_exception() in helper.c, so move
the array into that function.

Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1491821097-5647-1-git-send-email-peter.maydell@linaro.org
---
 target/arm/cpu.h       |  2 +-
 target/arm/internals.h | 23 -----------------------
 target/arm/helper.c    | 19 +++++++++++++++++++
 3 files changed, 20 insertions(+), 24 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index e6f05e2..ab86943 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -58,7 +58,7 @@
 #define EXCP_SEMIHOST       16   /* semihosting call */
 #define EXCP_NOCP           17   /* v7M NOCP UsageFault */
 #define EXCP_INVSTATE       18   /* v7M INVSTATE UsageFault */
-/* NB: new EXCP_ defines should be added to the excnames[] array too */
+/* NB: add new EXCP_ defines to the array in arm_log_exception() too */
 
 #define ARMV7M_EXCP_RESET   1
 #define ARMV7M_EXCP_NMI     2
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 97ca034..1f6efef 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -51,29 +51,6 @@ static inline bool excp_is_internal(int excp)
         || excp == EXCP_SEMIHOST;
 }
 
-/* Exception names for debug logging; note that not all of these
- * precisely correspond to architectural exceptions.
- */
-static const char * const excnames[] = {
-    [EXCP_UDEF] = "Undefined Instruction",
-    [EXCP_SWI] = "SVC",
-    [EXCP_PREFETCH_ABORT] = "Prefetch Abort",
-    [EXCP_DATA_ABORT] = "Data Abort",
-    [EXCP_IRQ] = "IRQ",
-    [EXCP_FIQ] = "FIQ",
-    [EXCP_BKPT] = "Breakpoint",
-    [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit",
-    [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage",
-    [EXCP_HVC] = "Hypervisor Call",
-    [EXCP_HYP_TRAP] = "Hypervisor Trap",
-    [EXCP_SMC] = "Secure Monitor Call",
-    [EXCP_VIRQ] = "Virtual IRQ",
-    [EXCP_VFIQ] = "Virtual FIQ",
-    [EXCP_SEMIHOST] = "Semihosting call",
-    [EXCP_NOCP] = "v7M NOCP UsageFault",
-    [EXCP_INVSTATE] = "v7M INVSTATE UsageFault",
-};
-
 /* Scale factor for generic timers, ie number of ns per tick.
  * This gives a 62.5MHz timer.
  */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 8cb7a94..8a3e448 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6271,6 +6271,25 @@ static void arm_log_exception(int idx)
 {
     if (qemu_loglevel_mask(CPU_LOG_INT)) {
         const char *exc = NULL;
+        static const char * const excnames[] = {
+            [EXCP_UDEF] = "Undefined Instruction",
+            [EXCP_SWI] = "SVC",
+            [EXCP_PREFETCH_ABORT] = "Prefetch Abort",
+            [EXCP_DATA_ABORT] = "Data Abort",
+            [EXCP_IRQ] = "IRQ",
+            [EXCP_FIQ] = "FIQ",
+            [EXCP_BKPT] = "Breakpoint",
+            [EXCP_EXCEPTION_EXIT] = "QEMU v7M exception exit",
+            [EXCP_KERNEL_TRAP] = "QEMU intercept of kernel commpage",
+            [EXCP_HVC] = "Hypervisor Call",
+            [EXCP_HYP_TRAP] = "Hypervisor Trap",
+            [EXCP_SMC] = "Secure Monitor Call",
+            [EXCP_VIRQ] = "Virtual IRQ",
+            [EXCP_VFIQ] = "Virtual FIQ",
+            [EXCP_SEMIHOST] = "Semihosting call",
+            [EXCP_NOCP] = "v7M NOCP UsageFault",
+            [EXCP_INVSTATE] = "v7M INVSTATE UsageFault",
+        };
 
         if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
             exc = excnames[idx];
-- 
2.7.4

  parent reply	other threads:[~2017-04-20 16:41 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-20 16:40 [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 01/24] hw/arm/boot: take Linux/arm64 TEXT_OFFSET header field into account Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 02/24] hw/arm/exynos: Convert fprintf to qemu_log_mask/error_report Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 03/24] hw/char/exynos4210_uart: Constify static array and few arguments Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 04/24] hw/misc/exynos4210_pmu: Reorder local variables for readability Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 05/24] target/arm: Add missing entries to excnames[] for log strings Peter Maydell
2017-04-20 16:40 ` Peter Maydell [this message]
2017-04-20 16:40 ` [Qemu-devel] [PULL 07/24] target/arm: Add assertion about FSC format for syndrome registers Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 08/24] stellaris: Don't hw_error() on bad register accesses Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 09/24] arm/kvm: Remove trailing newlines from error_report() Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 10/24] hw/arm: Qomify pxa2xx.c Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 11/24] cadence_gem: Read the correct queue descriptor Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 12/24] cadence_gem: Correct the multi-queue can rx logic Peter Maydell
2017-04-20 16:40 ` [Qemu-devel] [PULL 13/24] cadence_gem: Correct the interupt logic Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 14/24] cadence_gem: Make the revision a property Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 15/24] xlnx-zynqmp: Set the Cadence GEM revision Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 16/24] arm: Don't implement BXJ on M-profile CPUs Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 17/24] arm: Thumb shift operations should not permit interworking branches Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 18/24] arm: Factor out "generate right kind of step exception" Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 19/24] arm: Move gen_set_condexec() and gen_set_pc_im() up in the file Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 20/24] arm: Move condition-failed codepath generation out of if() Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 21/24] arm: Abstract out "are we singlestepping" test to utility function Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 22/24] arm: Track M profile handler mode state in TB flags Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 23/24] arm: Implement M profile exception return properly Peter Maydell
2017-04-20 16:41 ` [Qemu-devel] [PULL 24/24] arm: Remove workarounds for old M-profile exception return implementation Peter Maydell
2017-04-20 17:30 ` [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell

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