From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-ppc@nongnu.org
Cc: "Daniel Henrique Barboza" <danielhb413@gmail.com>,
qemu-devel@nongnu.org, "BALATON Zoltan" <balaton@eik.bme.hu>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [PATCH v4 12/24] ppc/ppc405: QOM'ify GPIO
Date: Tue, 9 Aug 2022 17:38:52 +0200 [thread overview]
Message-ID: <20220809153904.485018-13-clg@kaod.org> (raw)
In-Reply-To: <20220809153904.485018-1-clg@kaod.org>
The GPIO controller is currently modeled as a simple SysBus device
with a unique memory region.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ppc/ppc405.h | 21 +++++++++++++++++++
hw/ppc/ppc405_uc.c | 51 +++++++++++++++++++++------------------------
hw/ppc/trace-events | 1 -
3 files changed, 45 insertions(+), 28 deletions(-)
diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h
index a5b493d3e7bf..21f6cb358501 100644
--- a/hw/ppc/ppc405.h
+++ b/hw/ppc/ppc405.h
@@ -63,6 +63,26 @@ struct ppc4xx_bd_info_t {
uint32_t bi_iic_fast[2];
};
+/* GPIO */
+#define TYPE_PPC405_GPIO "ppc405-gpio"
+OBJECT_DECLARE_SIMPLE_TYPE(Ppc405GpioState, PPC405_GPIO);
+struct Ppc405GpioState {
+ SysBusDevice parent_obj;
+
+ MemoryRegion io;
+ uint32_t or;
+ uint32_t tcr;
+ uint32_t osrh;
+ uint32_t osrl;
+ uint32_t tsrh;
+ uint32_t tsrl;
+ uint32_t odr;
+ uint32_t ir;
+ uint32_t rr1;
+ uint32_t isr1h;
+ uint32_t isr1l;
+};
+
/* On Chip Memory */
#define TYPE_PPC405_OCM "ppc405-ocm"
OBJECT_DECLARE_SIMPLE_TYPE(Ppc405OcmState, PPC405_OCM);
@@ -152,6 +172,7 @@ struct Ppc405SoCState {
Ppc405CpcState cpc;
Ppc405GptState gpt;
Ppc405OcmState ocm;
+ Ppc405GpioState gpio;
};
/* PowerPC 405 core */
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 8b15132aadc0..1a2cbac2748b 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -713,23 +713,6 @@ static void ppc405_dma_init(CPUPPCState *env, qemu_irq irqs[4])
}
/*****************************************************************************/
-/* GPIO */
-typedef struct ppc405_gpio_t ppc405_gpio_t;
-struct ppc405_gpio_t {
- MemoryRegion io;
- uint32_t or;
- uint32_t tcr;
- uint32_t osrh;
- uint32_t osrl;
- uint32_t tsrh;
- uint32_t tsrl;
- uint32_t odr;
- uint32_t ir;
- uint32_t rr1;
- uint32_t isr1h;
- uint32_t isr1l;
-};
-
static uint64_t ppc405_gpio_read(void *opaque, hwaddr addr, unsigned size)
{
trace_ppc405_gpio_read(addr, size);
@@ -748,20 +731,23 @@ static const MemoryRegionOps ppc405_gpio_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static void ppc405_gpio_reset (void *opaque)
+static void ppc405_gpio_realize(DeviceState *dev, Error **errp)
{
+ Ppc405GpioState *s = PPC405_GPIO(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+
+ memory_region_init_io(&s->io, OBJECT(s), &ppc405_gpio_ops, s, "gpio",
+ 0x038);
+ sysbus_init_mmio(sbd, &s->io);
}
-static void ppc405_gpio_init(hwaddr base)
+static void ppc405_gpio_class_init(ObjectClass *oc, void *data)
{
- ppc405_gpio_t *gpio;
-
- trace_ppc405_gpio_init(base);
+ DeviceClass *dc = DEVICE_CLASS(oc);
- gpio = g_new0(ppc405_gpio_t, 1);
- memory_region_init_io(&gpio->io, NULL, &ppc405_gpio_ops, gpio, "pgio", 0x038);
- memory_region_add_subregion(get_system_memory(), base, &gpio->io);
- qemu_register_reset(&ppc405_gpio_reset, gpio);
+ dc->realize = ppc405_gpio_realize;
+ /* Reason: only works as function of a ppc4xx SoC */
+ dc->user_creatable = false;
}
/*****************************************************************************/
@@ -1408,6 +1394,8 @@ static void ppc405_soc_instance_init(Object *obj)
object_initialize_child(obj, "gpt", &s->gpt, TYPE_PPC405_GPT);
object_initialize_child(obj, "ocm", &s->ocm, TYPE_PPC405_OCM);
+
+ object_initialize_child(obj, "gpio", &s->gpio, TYPE_PPC405_GPIO);
}
static void ppc405_reset(void *opaque)
@@ -1485,8 +1473,12 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
/* I2C controller */
sysbus_create_simple(TYPE_PPC4xx_I2C, 0xef600500,
qdev_get_gpio_in(s->uic, 2));
+
/* GPIO */
- ppc405_gpio_init(0xef600700);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, 0xef600700);
/* Serial ports */
if (serial_hd(0) != NULL) {
@@ -1549,6 +1541,11 @@ static void ppc405_soc_class_init(ObjectClass *oc, void *data)
static const TypeInfo ppc405_types[] = {
{
+ .name = TYPE_PPC405_GPIO,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(Ppc405GpioState),
+ .class_init = ppc405_gpio_class_init,
+ }, {
.name = TYPE_PPC405_OCM,
.parent = TYPE_PPC4xx_DCR_DEVICE,
.instance_size = sizeof(Ppc405OcmState),
diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events
index adb45008883a..66fbf0e03525 100644
--- a/hw/ppc/trace-events
+++ b/hw/ppc/trace-events
@@ -154,7 +154,6 @@ opba_init(uint64_t addr) "offet 0x%" PRIx64
ppc405_gpio_read(uint64_t addr, uint32_t size) "addr 0x%" PRIx64 " size %d"
ppc405_gpio_write(uint64_t addr, uint32_t size, uint64_t val) "addr 0x%" PRIx64 " size %d = 0x%" PRIx64
-ppc405_gpio_init(uint64_t addr) "offet 0x%" PRIx64
ocm_update_mappings(uint32_t isarc, uint32_t isacntl, uint32_t dsarc, uint32_t dsacntl, uint32_t ocm_isarc, uint32_t ocm_isacntl, uint32_t ocm_dsarc, uint32_t ocm_dsacntl) "OCM update ISA 0x%08" PRIx32 " 0x%08" PRIx32 " (0x%08" PRIx32" 0x%08" PRIx32 ") DSA 0x%08" PRIx32 " 0x%08" PRIx32" (0x%08" PRIx32 " 0x%08" PRIx32 ")"
ocm_map(const char* prefix, uint32_t isarc) "OCM map %s 0x%08" PRIx32
--
2.37.1
next prev parent reply other threads:[~2022-08-09 15:59 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-09 15:38 [PATCH v4 00/24] ppc: QOM'ify 405 board Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 01/24] ppc/ppc405: Remove taihu machine Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 02/24] ppc/ppc405: Introduce a PPC405 generic machine Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 03/24] ppc/ppc405: Move devices under the ref405ep machine Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 04/24] ppc/ppc405: Move SRAM " Cédric Le Goater
2022-08-09 16:53 ` BALATON Zoltan
2022-08-09 17:42 ` Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 05/24] ppc/ppc405: Introduce a PPC405 SoC Cédric Le Goater
2022-08-09 16:59 ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 06/24] ppc/ppc405: Start QOMification of the SoC Cédric Le Goater
2022-08-09 17:12 ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 07/24] ppc/ppc405: QOM'ify CPU Cédric Le Goater
2022-08-09 17:15 ` BALATON Zoltan
2022-08-09 17:39 ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 08/24] ppc/ppc4xx: Introduce a DCR device model Cédric Le Goater
2022-08-09 17:21 ` BALATON Zoltan
2022-08-10 12:38 ` Cédric Le Goater
2022-08-10 13:28 ` BALATON Zoltan
2022-08-10 13:57 ` Cédric Le Goater
2022-08-10 14:48 ` BALATON Zoltan
2022-08-11 7:09 ` Cédric Le Goater
2022-08-11 11:39 ` BALATON Zoltan
2022-08-11 12:20 ` Cédric Le Goater
2022-08-11 21:55 ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 09/24] ppc/ppc405: QOM'ify CPC Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 10/24] ppc/ppc405: QOM'ify GPT Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 11/24] ppc/ppc405: QOM'ify OCM Cédric Le Goater
2022-08-09 15:38 ` Cédric Le Goater [this message]
2022-08-09 15:38 ` [PATCH v4 13/24] ppc/ppc405: QOM'ify DMA Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 14/24] ppc/ppc405: QOM'ify EBC Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 15/24] ppc/ppc405: QOM'ify OPBA Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 16/24] ppc/ppc405: QOM'ify POB Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 17/24] ppc/ppc405: QOM'ify PLB Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 18/24] ppc/ppc405: QOM'ify MAL Cédric Le Goater
2022-08-09 17:34 ` BALATON Zoltan
2022-08-10 6:17 ` Cédric Le Goater
2022-08-10 21:35 ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 19/24] ppc/ppc405: QOM'ify FPGA Cédric Le Goater
2022-08-09 17:37 ` BALATON Zoltan
2022-08-10 6:22 ` Cédric Le Goater
2022-08-10 11:40 ` BALATON Zoltan
2022-08-10 17:22 ` Daniel Henrique Barboza
2022-08-10 17:32 ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 20/24] ppc/ppc405: Use an embedded PPCUIC model in SoC state Cédric Le Goater
2022-08-09 17:40 ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 21/24] ppc/ppc405: Use an explicit I2C object Cédric Le Goater
2022-08-09 17:45 ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 22/24] ppc/ppc4xx: Fix sdram trace events Cédric Le Goater
2022-08-09 17:47 ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 23/24] ppc/ppc405: QOM'ify SDRAM Cédric Le Goater
2022-08-09 17:53 ` BALATON Zoltan
2022-08-10 6:26 ` Cédric Le Goater
2022-08-10 11:39 ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 24/24] ppc/ppc405: Add check on minimum RAM size Cédric Le Goater
2022-08-09 17:55 ` BALATON Zoltan
2022-08-10 6:24 ` Cédric Le Goater
2022-08-11 8:24 ` [PATCH v4 00/24] ppc: QOM'ify 405 board Daniel Henrique Barboza
2022-08-11 8:33 ` Cédric Le Goater
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