All the mail mirrored from lore.kernel.org
 help / color / mirror / Atom feed
From: BALATON Zoltan <balaton@eik.bme.hu>
To: Daniel Henrique Barboza <danielhb413@gmail.com>
Cc: "Cédric Le Goater" <clg@kaod.org>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	"Peter Maydell" <peter.maydell@linaro.org>
Subject: Re: [PATCH v4 19/24] ppc/ppc405: QOM'ify FPGA
Date: Wed, 10 Aug 2022 19:32:24 +0200 (CEST)	[thread overview]
Message-ID: <67dedad4-b30-3e6a-d0a4-c53565d9184@eik.bme.hu> (raw)
In-Reply-To: <147b0514-1f62-bd50-48c8-ad7b6d351468@gmail.com>

[-- Attachment #1: Type: text/plain, Size: 5226 bytes --]

On Wed, 10 Aug 2022, Daniel Henrique Barboza wrote:
> On 8/9/22 14:37, BALATON Zoltan wrote:
>> On Tue, 9 Aug 2022, Cédric Le Goater wrote:
>>> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
>>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>>> ---
>>> hw/ppc/ppc405_boards.c | 55 +++++++++++++++++++++++++++++-------------
>>> 1 file changed, 38 insertions(+), 17 deletions(-)
>>> 
>>> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
>>> index 3677793adc75..4ff6715f3533 100644
>>> --- a/hw/ppc/ppc405_boards.c
>>> +++ b/hw/ppc/ppc405_boards.c
>>> @@ -71,18 +71,23 @@ struct Ppc405MachineState {
>>>  * - NVRAM (0xF0000000)
>>>  * - FPGA  (0xF0300000)
>>>  */
>>> -typedef struct ref405ep_fpga_t ref405ep_fpga_t;
>>> -struct ref405ep_fpga_t {
>>> +
>>> +#define TYPE_REF405EP_FPGA "ref405ep-fpga"
>>> +OBJECT_DECLARE_SIMPLE_TYPE(Ref405epFpgaState, REF405EP_FPGA);
>>> +struct Ref405epFpgaState {
>>> +    SysBusDevice parent_obj;
>>> +
>>> +    MemoryRegion iomem;
>>> +
>>>     uint8_t reg0;
>>>     uint8_t reg1;
>>> };
>>> 
>>> static uint64_t ref405ep_fpga_readb(void *opaque, hwaddr addr, unsigned 
>>> size)
>>> {
>>> -    ref405ep_fpga_t *fpga;
>>> +    Ref405epFpgaState *fpga = REF405EP_FPGA(opaque);
>>>     uint32_t ret;
>>> 
>>> -    fpga = opaque;
>>>     switch (addr) {
>>>     case 0x0:
>>>         ret = fpga->reg0;
>>> @@ -101,9 +106,8 @@ static uint64_t ref405ep_fpga_readb(void *opaque, 
>>> hwaddr addr, unsigned size)
>>> static void ref405ep_fpga_writeb(void *opaque, hwaddr addr, uint64_t 
>>> value,
>>>                                  unsigned size)
>>> {
>>> -    ref405ep_fpga_t *fpga;
>>> +    Ref405epFpgaState *fpga = REF405EP_FPGA(opaque);
>>> 
>>> -    fpga = opaque;
>>>     switch (addr) {
>>>     case 0x0:
>>>         /* Read only */
>>> @@ -126,27 +130,39 @@ static const MemoryRegionOps ref405ep_fpga_ops = {
>>>     .endianness = DEVICE_BIG_ENDIAN,
>>> };
>>> 
>>> -static void ref405ep_fpga_reset (void *opaque)
>>> +static void ref405ep_fpga_reset(DeviceState *dev)
>>> {
>>> -    ref405ep_fpga_t *fpga;
>>> +    Ref405epFpgaState *fpga = REF405EP_FPGA(dev);
>>> 
>>> -    fpga = opaque;
>>>     fpga->reg0 = 0x00;
>>>     fpga->reg1 = 0x0F;
>>> }
>>> 
>>> -static void ref405ep_fpga_init(MemoryRegion *sysmem, uint32_t base)
>>> +static void ref405ep_fpga_realize(DeviceState *dev, Error **errp)
>>> {
>>> -    ref405ep_fpga_t *fpga;
>>> -    MemoryRegion *fpga_memory = g_new(MemoryRegion, 1);
>>> +    Ref405epFpgaState *s = REF405EP_FPGA(dev);
>>> 
>>> -    fpga = g_new0(ref405ep_fpga_t, 1);
>>> -    memory_region_init_io(fpga_memory, NULL, &ref405ep_fpga_ops, fpga,
>>> +    memory_region_init_io(&s->iomem, OBJECT(s), &ref405ep_fpga_ops, s,
>>>                           "fpga", 0x00000100);
>>> -    memory_region_add_subregion(sysmem, base, fpga_memory);
>>> -    qemu_register_reset(&ref405ep_fpga_reset, fpga);
>>> +    sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
>>> +}
>>> +
>>> +static void ref405ep_fpga_class_init(ObjectClass *oc, void *data)
>>> +{
>>> +    DeviceClass *dc = DEVICE_CLASS(oc);
>>> +
>>> +    dc->realize = ref405ep_fpga_realize;
>>> +    dc->user_creatable = false;
>> 
>> Comment missing (and I'd drop unnecessary QOM casts) but otherwise:
>
> Which QOM casts are you referring to?

Those that I've discussed in other patches, it's all QOMify patches not 
only this one. Cédric knows what I mean. But there are other small chnages 
elsewhere that probably need another version anyway so I think you don't 
need to do anything with this patch.

Regards,
BALATON Zoltan

>
> Daniel
>
>> 
>> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
>> 
>> Regards,
>> BALATON Zoltan
>> 
>>> +    dc->reset = ref405ep_fpga_reset;
>>> }
>>> 
>>> +static const TypeInfo ref405ep_fpga_type = {
>>> +    .name = TYPE_REF405EP_FPGA,
>>> +    .parent = TYPE_SYS_BUS_DEVICE,
>>> +    .instance_size = sizeof(Ref405epFpgaState),
>>> +    .class_init = ref405ep_fpga_class_init,
>>> +};
>>> +
>>> /*
>>>  * CPU reset handler when booting directly from a loaded kernel
>>>  */
>>> @@ -331,7 +347,11 @@ static void ref405ep_init(MachineState *machine)
>>>     memory_region_add_subregion(get_system_memory(), PPC405EP_SRAM_BASE, 
>>> sram);
>>> 
>>>     /* Register FPGA */
>>> -    ref405ep_fpga_init(get_system_memory(), PPC405EP_FPGA_BASE);
>>> +    dev = qdev_new(TYPE_REF405EP_FPGA);
>>> +    object_property_add_child(OBJECT(machine), "fpga", OBJECT(dev));
>>> +    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>>> +    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, PPC405EP_FPGA_BASE);
>>> +
>>>     /* Register NVRAM */
>>>     dev = qdev_new("sysbus-m48t08");
>>>     qdev_prop_set_int32(dev, "base-year", 1968);
>>> @@ -376,6 +396,7 @@ static void ppc405_machine_init(void)
>>> {
>>>     type_register_static(&ppc405_machine_type);
>>>     type_register_static(&ref405ep_type);
>>> +    type_register_static(&ref405ep_fpga_type);
>>> }
>>> 
>>> type_init(ppc405_machine_init)
>>> 
>
>

  reply	other threads:[~2022-08-10 17:37 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-09 15:38 [PATCH v4 00/24] ppc: QOM'ify 405 board Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 01/24] ppc/ppc405: Remove taihu machine Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 02/24] ppc/ppc405: Introduce a PPC405 generic machine Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 03/24] ppc/ppc405: Move devices under the ref405ep machine Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 04/24] ppc/ppc405: Move SRAM " Cédric Le Goater
2022-08-09 16:53   ` BALATON Zoltan
2022-08-09 17:42     ` Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 05/24] ppc/ppc405: Introduce a PPC405 SoC Cédric Le Goater
2022-08-09 16:59   ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 06/24] ppc/ppc405: Start QOMification of the SoC Cédric Le Goater
2022-08-09 17:12   ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 07/24] ppc/ppc405: QOM'ify CPU Cédric Le Goater
2022-08-09 17:15   ` BALATON Zoltan
2022-08-09 17:39   ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 08/24] ppc/ppc4xx: Introduce a DCR device model Cédric Le Goater
2022-08-09 17:21   ` BALATON Zoltan
2022-08-10 12:38     ` Cédric Le Goater
2022-08-10 13:28       ` BALATON Zoltan
2022-08-10 13:57         ` Cédric Le Goater
2022-08-10 14:48           ` BALATON Zoltan
2022-08-11  7:09             ` Cédric Le Goater
2022-08-11 11:39               ` BALATON Zoltan
2022-08-11 12:20                 ` Cédric Le Goater
2022-08-11 21:55                   ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 09/24] ppc/ppc405: QOM'ify CPC Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 10/24] ppc/ppc405: QOM'ify GPT Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 11/24] ppc/ppc405: QOM'ify OCM Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 12/24] ppc/ppc405: QOM'ify GPIO Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 13/24] ppc/ppc405: QOM'ify DMA Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 14/24] ppc/ppc405: QOM'ify EBC Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 15/24] ppc/ppc405: QOM'ify OPBA Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 16/24] ppc/ppc405: QOM'ify POB Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 17/24] ppc/ppc405: QOM'ify PLB Cédric Le Goater
2022-08-09 15:38 ` [PATCH v4 18/24] ppc/ppc405: QOM'ify MAL Cédric Le Goater
2022-08-09 17:34   ` BALATON Zoltan
2022-08-10  6:17     ` Cédric Le Goater
2022-08-10 21:35   ` BALATON Zoltan
2022-08-09 15:38 ` [PATCH v4 19/24] ppc/ppc405: QOM'ify FPGA Cédric Le Goater
2022-08-09 17:37   ` BALATON Zoltan
2022-08-10  6:22     ` Cédric Le Goater
2022-08-10 11:40       ` BALATON Zoltan
2022-08-10 17:22     ` Daniel Henrique Barboza
2022-08-10 17:32       ` BALATON Zoltan [this message]
2022-08-09 15:39 ` [PATCH v4 20/24] ppc/ppc405: Use an embedded PPCUIC model in SoC state Cédric Le Goater
2022-08-09 17:40   ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 21/24] ppc/ppc405: Use an explicit I2C object Cédric Le Goater
2022-08-09 17:45   ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 22/24] ppc/ppc4xx: Fix sdram trace events Cédric Le Goater
2022-08-09 17:47   ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 23/24] ppc/ppc405: QOM'ify SDRAM Cédric Le Goater
2022-08-09 17:53   ` BALATON Zoltan
2022-08-10  6:26     ` Cédric Le Goater
2022-08-10 11:39       ` BALATON Zoltan
2022-08-09 15:39 ` [PATCH v4 24/24] ppc/ppc405: Add check on minimum RAM size Cédric Le Goater
2022-08-09 17:55   ` BALATON Zoltan
2022-08-10  6:24     ` Cédric Le Goater
2022-08-11  8:24 ` [PATCH v4 00/24] ppc: QOM'ify 405 board Daniel Henrique Barboza
2022-08-11  8:33   ` Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=67dedad4-b30-3e6a-d0a4-c53565d9184@eik.bme.hu \
    --to=balaton@eik.bme.hu \
    --cc=clg@kaod.org \
    --cc=danielhb413@gmail.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.