From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Jiang <dave.jiang@intel.com>, <linux-cxl@vger.kernel.org>,
<ira.weiny@intel.com>, <vishal.l.verma@intel.com>,
<alison.schofield@intel.com>, <dave@stgolabs.net>
Subject: Re: [PATCH v7 3/5] cxl: Fix incorrect region perf data calculation
Date: Mon, 8 Apr 2024 10:54:36 +0100 [thread overview]
Message-ID: <20240408105436.0000175e@Huawei.com> (raw)
In-Reply-To: <66107c715e6ca_2583ad294cd@dwillia2-xfh.jf.intel.com.notmuch>
On Fri, 5 Apr 2024 15:34:25 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> Dave Jiang wrote:
> > Current math in cxl_region_perf_data_calculate divides the latency by 1000
> > every time the function gets called. This causes the region latency to be
> > divided by 1000 per memory device and the math is incorrect. This is user
> > visible as the latency access_coordinate exposed via sysfs will show
> > incorrect latency data.
> >
> > Normalize values from CDAT to nanoseconds. Adjust sub-nanoseconds latency
> > to at least 1. Remove adjustment of perf numbers from the generic target
> > since hmat handling code has already normalized those numbers. Now all
> > computation and stored numbers should be in nanoseconds.
> >
> > cxl_hb_get_perf_coordinates() is removed and HB coords are calculated
> > in the port access_coordinate calculation path since it no longer need
> > to be treated special.
> >
> > Fixes: 3d9f4a197230 ("cxl/region: Calculate performance data for a region")
> > Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> > ---
> > v7:
> > - Remove min_not_zero(). Incorrectly set everything to 1. DIV_ROUNDUP()
> > will ensure sub-nanoseconds values not 0 unless value 0 to begin with.
> > (Jonathan)
> > - Reflowed patch order
> > - Remove cxl_hb_get_perf_coordinates() as change made function unnessary.
> > - Add hb access_coordinate back to port caclculation.
> > ---
> > drivers/cxl/acpi.c | 13 +-----
> > drivers/cxl/core/cdat.c | 89 ++++++++++++++++-------------------------
> > drivers/cxl/core/port.c | 36 ++---------------
> > drivers/cxl/cxl.h | 2 -
> > 4 files changed, 40 insertions(+), 100 deletions(-)
>
> yum... bug fix that removes more than double the code it adds.
>
> [..]
> > diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c
> > index eddbbe21450c..48704976693e 100644
> > --- a/drivers/cxl/core/cdat.c
> > +++ b/drivers/cxl/core/cdat.c
> > @@ -20,6 +20,31 @@ struct dsmas_entry {
> > int qos_class;
> > };
> >
> > +static u32 cdat_normalize(u16 entry, u64 base, u8 type)
> > +{
> > + u32 value;
> > +
> > + /*
> > + * Check for invalid and overflow values
> > + */
> > + if (entry == 0xffff || !entry)
> > + return 0;
> > + else if (base > (UINT_MAX / (entry)))
> > + return 0;
> > +
> > + value = entry * base;
>
> Might be worth a reminder comment here that CDAT fields follow the
> format of HMAT fields when a future reader wonders why these type names
> are not CDAT_ACCESS_LATENCY, etc. Bonus points for a "see Table 5
> Device Scoped Latency and Bandwidth Information Structure in Coherent
> Device Attribute Table (CDAT) Specification v1.01"
Call out a specific HMAT version if you do add such a comment.
We don't want anyone to happen to look at an early version and get
even more confused :(
>
> Either way you can add:
>
> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
next prev parent reply other threads:[~2024-04-08 9:54 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-03 15:47 [PATCH v7 0/5] cxl: access_coordinate validity fixes for 6.9 Dave Jiang
2024-04-03 15:47 ` [PATCH v7 1/5] cxl: Remove checking of iter in cxl_endpoint_get_perf_coordinates() Dave Jiang
2024-04-26 19:10 ` Robert Richter
2024-04-26 20:13 ` Dave Jiang
2024-04-03 15:47 ` [PATCH v7 2/5] cxl: Fix retrieving of access_coordinates in PCIe path Dave Jiang
2024-04-05 13:32 ` Jonathan Cameron
2024-04-05 22:24 ` Dan Williams
2024-04-03 15:47 ` [PATCH v7 3/5] cxl: Fix incorrect region perf data calculation Dave Jiang
2024-04-05 13:48 ` Jonathan Cameron
2024-04-05 22:34 ` Dan Williams
2024-04-08 9:54 ` Jonathan Cameron [this message]
2024-04-03 15:47 ` [PATCH v7 4/5] cxl: Consolidate dport access_coordinate ->hb_coord and ->sw_coord into ->coord Dave Jiang
2024-04-03 15:47 ` [PATCH v7 5/5] cxl: Add checks to access_coordinate calculation to fail missing data Dave Jiang
2024-04-05 22:36 ` Dan Williams
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240408105436.0000175e@Huawei.com \
--to=jonathan.cameron@huawei.com \
--cc=alison.schofield@intel.com \
--cc=dan.j.williams@intel.com \
--cc=dave.jiang@intel.com \
--cc=dave@stgolabs.net \
--cc=ira.weiny@intel.com \
--cc=linux-cxl@vger.kernel.org \
--cc=vishal.l.verma@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.