From: "Jan Beulich" <JBeulich@suse.com> To: qemu-devel@nongnu.org Cc: xen-devel <xen-devel@lists.xenproject.org>, Stefano Stabellini <stefano.stabellini@eu.citrix.com> Subject: [Qemu-devel] [PATCH 3/6] xen/MSI-X: really enforce alignment Date: Fri, 05 Jun 2015 13:02:40 +0100 [thread overview] Message-ID: <5571AC000200007800081567@mail.emea.novell.com> (raw) In-Reply-To: <5571AA3B020000780008152E@mail.emea.novell.com> [-- Attachment #1: Type: text/plain, Size: 1821 bytes --] The way the generic infrastructure works the intention of not allowing unaligned accesses can't be achieved by simply setting .unaligned to false. The benefit is that we can now replace the conditionals in {get,set}_entry_value() by assert()-s. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/qemu/upstream/hw/xen/xen_pt_msi.c +++ b/qemu/upstream/hw/xen/xen_pt_msi.c @@ -421,16 +421,14 @@ int xen_pt_msix_update_remap(XenPCIPasst static uint32_t get_entry_value(XenPTMSIXEntry *e, int offset) { - return !(offset % sizeof(*e->latch)) - ? e->latch[offset / sizeof(*e->latch)] : 0; + assert(!(offset % sizeof(*e->latch))); + return e->latch[offset / sizeof(*e->latch)]; } static void set_entry_value(XenPTMSIXEntry *e, int offset, uint32_t val) { - if (!(offset % sizeof(*e->latch))) - { - e->latch[offset / sizeof(*e->latch)] = val; - } + assert(!(offset % sizeof(*e->latch))); + e->latch[offset / sizeof(*e->latch)] = val; } static void pci_msix_write(void *opaque, hwaddr addr, @@ -496,6 +494,12 @@ static uint64_t pci_msix_read(void *opaq } } +static bool pci_msix_accepts(void *opaque, hwaddr addr, + unsigned size, bool is_write) +{ + return !(addr & (size - 1)); +} + static const MemoryRegionOps pci_msix_ops = { .read = pci_msix_read, .write = pci_msix_write, @@ -504,7 +508,13 @@ static const MemoryRegionOps pci_msix_op .min_access_size = 4, .max_access_size = 4, .unaligned = false, + .accepts = pci_msix_accepts }, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + .unaligned = false + } }; int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base) [-- Attachment #2: qemu-MSI-X-force-align.patch --] [-- Type: text/plain, Size: 1854 bytes --] xen/MSI-X: really enforce alignment The way the generic infrastructure works the intention of not allowing unaligned accesses can't be achieved by simply setting .unaligned to false. The benefit is that we can now replace the conditionals in {get,set}_entry_value() by assert()-s. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/qemu/upstream/hw/xen/xen_pt_msi.c +++ b/qemu/upstream/hw/xen/xen_pt_msi.c @@ -421,16 +421,14 @@ int xen_pt_msix_update_remap(XenPCIPasst static uint32_t get_entry_value(XenPTMSIXEntry *e, int offset) { - return !(offset % sizeof(*e->latch)) - ? e->latch[offset / sizeof(*e->latch)] : 0; + assert(!(offset % sizeof(*e->latch))); + return e->latch[offset / sizeof(*e->latch)]; } static void set_entry_value(XenPTMSIXEntry *e, int offset, uint32_t val) { - if (!(offset % sizeof(*e->latch))) - { - e->latch[offset / sizeof(*e->latch)] = val; - } + assert(!(offset % sizeof(*e->latch))); + e->latch[offset / sizeof(*e->latch)] = val; } static void pci_msix_write(void *opaque, hwaddr addr, @@ -496,6 +494,12 @@ static uint64_t pci_msix_read(void *opaq } } +static bool pci_msix_accepts(void *opaque, hwaddr addr, + unsigned size, bool is_write) +{ + return !(addr & (size - 1)); +} + static const MemoryRegionOps pci_msix_ops = { .read = pci_msix_read, .write = pci_msix_write, @@ -504,7 +508,13 @@ static const MemoryRegionOps pci_msix_op .min_access_size = 4, .max_access_size = 4, .unaligned = false, + .accepts = pci_msix_accepts }, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + .unaligned = false + } }; int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base)
WARNING: multiple messages have this Message-ID (diff)
From: "Jan Beulich" <JBeulich@suse.com> To: qemu-devel@nongnu.org Cc: xen-devel <xen-devel@lists.xenproject.org>, Stefano Stabellini <stefano.stabellini@eu.citrix.com> Subject: [PATCH 3/6] xen/MSI-X: really enforce alignment Date: Fri, 05 Jun 2015 13:02:40 +0100 [thread overview] Message-ID: <5571AC000200007800081567@mail.emea.novell.com> (raw) In-Reply-To: <5571AA3B020000780008152E@mail.emea.novell.com> [-- Attachment #1: Type: text/plain, Size: 1821 bytes --] The way the generic infrastructure works the intention of not allowing unaligned accesses can't be achieved by simply setting .unaligned to false. The benefit is that we can now replace the conditionals in {get,set}_entry_value() by assert()-s. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/qemu/upstream/hw/xen/xen_pt_msi.c +++ b/qemu/upstream/hw/xen/xen_pt_msi.c @@ -421,16 +421,14 @@ int xen_pt_msix_update_remap(XenPCIPasst static uint32_t get_entry_value(XenPTMSIXEntry *e, int offset) { - return !(offset % sizeof(*e->latch)) - ? e->latch[offset / sizeof(*e->latch)] : 0; + assert(!(offset % sizeof(*e->latch))); + return e->latch[offset / sizeof(*e->latch)]; } static void set_entry_value(XenPTMSIXEntry *e, int offset, uint32_t val) { - if (!(offset % sizeof(*e->latch))) - { - e->latch[offset / sizeof(*e->latch)] = val; - } + assert(!(offset % sizeof(*e->latch))); + e->latch[offset / sizeof(*e->latch)] = val; } static void pci_msix_write(void *opaque, hwaddr addr, @@ -496,6 +494,12 @@ static uint64_t pci_msix_read(void *opaq } } +static bool pci_msix_accepts(void *opaque, hwaddr addr, + unsigned size, bool is_write) +{ + return !(addr & (size - 1)); +} + static const MemoryRegionOps pci_msix_ops = { .read = pci_msix_read, .write = pci_msix_write, @@ -504,7 +508,13 @@ static const MemoryRegionOps pci_msix_op .min_access_size = 4, .max_access_size = 4, .unaligned = false, + .accepts = pci_msix_accepts }, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + .unaligned = false + } }; int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base) [-- Attachment #2: qemu-MSI-X-force-align.patch --] [-- Type: text/plain, Size: 1854 bytes --] xen/MSI-X: really enforce alignment The way the generic infrastructure works the intention of not allowing unaligned accesses can't be achieved by simply setting .unaligned to false. The benefit is that we can now replace the conditionals in {get,set}_entry_value() by assert()-s. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/qemu/upstream/hw/xen/xen_pt_msi.c +++ b/qemu/upstream/hw/xen/xen_pt_msi.c @@ -421,16 +421,14 @@ int xen_pt_msix_update_remap(XenPCIPasst static uint32_t get_entry_value(XenPTMSIXEntry *e, int offset) { - return !(offset % sizeof(*e->latch)) - ? e->latch[offset / sizeof(*e->latch)] : 0; + assert(!(offset % sizeof(*e->latch))); + return e->latch[offset / sizeof(*e->latch)]; } static void set_entry_value(XenPTMSIXEntry *e, int offset, uint32_t val) { - if (!(offset % sizeof(*e->latch))) - { - e->latch[offset / sizeof(*e->latch)] = val; - } + assert(!(offset % sizeof(*e->latch))); + e->latch[offset / sizeof(*e->latch)] = val; } static void pci_msix_write(void *opaque, hwaddr addr, @@ -496,6 +494,12 @@ static uint64_t pci_msix_read(void *opaq } } +static bool pci_msix_accepts(void *opaque, hwaddr addr, + unsigned size, bool is_write) +{ + return !(addr & (size - 1)); +} + static const MemoryRegionOps pci_msix_ops = { .read = pci_msix_read, .write = pci_msix_write, @@ -504,7 +508,13 @@ static const MemoryRegionOps pci_msix_op .min_access_size = 4, .max_access_size = 4, .unaligned = false, + .accepts = pci_msix_accepts }, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + .unaligned = false + } }; int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base) [-- Attachment #3: Type: text/plain, Size: 126 bytes --] _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
next prev parent reply other threads:[~2015-06-05 12:02 UTC|newest] Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-06-05 11:55 [Qemu-devel] [PATCH 0/6] xen/pass-through: XSA-120, 128...131 follow-up Jan Beulich 2015-06-05 11:59 ` [Qemu-devel] [PATCH 1/6] xen/MSI-X: latch MSI-X table writes Jan Beulich 2015-06-05 11:59 ` Jan Beulich 2015-06-16 13:35 ` [Qemu-devel] " Stefano Stabellini 2015-06-16 14:04 ` Jan Beulich 2015-06-16 14:04 ` [Qemu-devel] " Jan Beulich 2015-06-16 14:48 ` Stefano Stabellini 2015-06-16 14:48 ` Stefano Stabellini 2015-06-16 13:35 ` Stefano Stabellini 2015-06-05 12:01 ` [Qemu-devel] [PATCH 2/6] xen/MSI-X: drive maskall and enable bits through hypercalls Jan Beulich 2015-06-05 12:01 ` Jan Beulich 2015-06-16 14:03 ` Stefano Stabellini 2015-06-16 14:03 ` [Qemu-devel] " Stefano Stabellini 2015-06-16 14:19 ` Jan Beulich 2015-06-16 14:19 ` [Qemu-devel] " Jan Beulich 2015-06-16 14:56 ` Stefano Stabellini 2015-06-16 14:56 ` [Qemu-devel] " Stefano Stabellini 2015-06-16 16:03 ` Jan Beulich 2015-06-16 16:03 ` Jan Beulich 2015-06-05 12:02 ` Jan Beulich [this message] 2015-06-05 12:02 ` [PATCH 3/6] xen/MSI-X: really enforce alignment Jan Beulich 2015-06-16 14:08 ` [Qemu-devel] " Stefano Stabellini 2015-06-16 14:08 ` Stefano Stabellini 2015-06-05 12:03 ` [Qemu-devel] [PATCH 4/6] xen/pass-through: correctly deal with RW1C bits Jan Beulich 2015-06-05 12:03 ` Jan Beulich 2015-06-16 14:19 ` Stefano Stabellini 2015-06-16 14:19 ` [Qemu-devel] " Stefano Stabellini 2015-06-16 14:38 ` Jan Beulich 2015-06-16 14:38 ` Jan Beulich 2015-06-05 12:04 ` [Qemu-devel] [PATCH 5/6] xen/pass-through: log errno values rather than function return ones Jan Beulich 2015-06-05 12:04 ` Jan Beulich 2015-06-16 14:23 ` Stefano Stabellini 2015-06-16 14:23 ` [Qemu-devel] " Stefano Stabellini 2015-06-05 12:04 ` [Qemu-devel] [PATCH 6/6] xen/pass-through: constify some static data Jan Beulich 2015-06-05 12:04 ` Jan Beulich 2015-06-16 14:27 ` [Qemu-devel] " Stefano Stabellini 2015-06-16 14:41 ` Jan Beulich 2015-06-16 14:41 ` [Qemu-devel] " Jan Beulich 2015-06-16 14:43 ` Stefano Stabellini 2015-06-16 14:43 ` Stefano Stabellini 2015-06-16 14:27 ` Stefano Stabellini
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