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From: eric.auger@linaro.org (Eric Auger)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 00/13] arm64: KVM: GICv3 ITS emulation
Date: Tue, 09 Jun 2015 10:12:30 +0200	[thread overview]
Message-ID: <55769FEE.70607@linaro.org> (raw)
In-Reply-To: <02ae01d0a1d9$732d2ce0$598786a0$@samsung.com>

On 06/08/2015 12:54 PM, Pavel Fedin wrote:
>  Hi!
> 
>> I'm afraid this is not enough. A write to GICR_TRANSLATER (DID+EID)
>> results in a (LPI,CPU) pair. Can you easily express the CPU part in
>> irqfd (this is a genuine question, I'm not familiar enough with that
>> part of the core)?

Currently on ARM, irqfd supports routing an host eventfd towards a
virtual SPI:
eventfd -> vSPI = gsi+32
parameters of irqfd are the eventfd and the gsi.

We do not implement KVM IRQ routing yet. This IRQ routing supports 2 modes:
1) irqchip routing: eventfd -> virtual gsi -> virtual irqchip.input pin
2) msi routing: eventfd -> virtual gsi -> virtual msi (@, data)

1) up to now we had a single virtual irqchip, vgicv2 or vgicv3 (no apic
as in x86, ...) so irqchip routing did not sound to be helpful
2) now we have virtual msi injection, we could use msi routing to inject
virtual LPI's. But is it what you need for your qemu integration?

Currently on QEMU side for VIRTIO-PCI with vhost back-end + GICv2m +
irqfd, so called kvm_gsi_direct_mapping is used:
the MSI data is extracted from the PCI virtio device MSI vector, the
virtual gsi = MSI data - 32 and eventually irqfd is programmed with the
eventfd and the gsi. That way MSI injection on guest is bypassed in
irqfd mode.

Please let us know

Best Regards

Eric
> 
>  But... As far as i could understand, LPI is added to a collection as a part of setup. And
> collection actually represents a destination CPU, doesn't it? And we can't have multiple
> LPIs sharing the same number and going to different CPUs. Or am i wrong? Unfortunately i
> don't have GICv3 arch reference manual.
> 
>> Another concern
>> would be the support of GICv4, which relies on the command queue
>> handling to be handled in the kernel
> 
>  Wow, i didn't know about GICv4.
> 
> Kind regards,
> Pavel Fedin
> Expert Engineer
> Samsung Electronics Research center Russia
> 
> 
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

WARNING: multiple messages have this Message-ID (diff)
From: Eric Auger <eric.auger@linaro.org>
To: Pavel Fedin <p.fedin@samsung.com>,
	'Marc Zyngier' <marc.zyngier@arm.com>,
	'Andre Przywara' <Andre.Przywara@arm.com>,
	christoffer.dall@linaro.org
Cc: kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 00/13] arm64: KVM: GICv3 ITS emulation
Date: Tue, 09 Jun 2015 10:12:30 +0200	[thread overview]
Message-ID: <55769FEE.70607@linaro.org> (raw)
In-Reply-To: <02ae01d0a1d9$732d2ce0$598786a0$@samsung.com>

On 06/08/2015 12:54 PM, Pavel Fedin wrote:
>  Hi!
> 
>> I'm afraid this is not enough. A write to GICR_TRANSLATER (DID+EID)
>> results in a (LPI,CPU) pair. Can you easily express the CPU part in
>> irqfd (this is a genuine question, I'm not familiar enough with that
>> part of the core)?

Currently on ARM, irqfd supports routing an host eventfd towards a
virtual SPI:
eventfd -> vSPI = gsi+32
parameters of irqfd are the eventfd and the gsi.

We do not implement KVM IRQ routing yet. This IRQ routing supports 2 modes:
1) irqchip routing: eventfd -> virtual gsi -> virtual irqchip.input pin
2) msi routing: eventfd -> virtual gsi -> virtual msi (@, data)

1) up to now we had a single virtual irqchip, vgicv2 or vgicv3 (no apic
as in x86, ...) so irqchip routing did not sound to be helpful
2) now we have virtual msi injection, we could use msi routing to inject
virtual LPI's. But is it what you need for your qemu integration?

Currently on QEMU side for VIRTIO-PCI with vhost back-end + GICv2m +
irqfd, so called kvm_gsi_direct_mapping is used:
the MSI data is extracted from the PCI virtio device MSI vector, the
virtual gsi = MSI data - 32 and eventually irqfd is programmed with the
eventfd and the gsi. That way MSI injection on guest is bypassed in
irqfd mode.

Please let us know

Best Regards

Eric
> 
>  But... As far as i could understand, LPI is added to a collection as a part of setup. And
> collection actually represents a destination CPU, doesn't it? And we can't have multiple
> LPIs sharing the same number and going to different CPUs. Or am i wrong? Unfortunately i
> don't have GICv3 arch reference manual.
> 
>> Another concern
>> would be the support of GICv4, which relies on the command queue
>> handling to be handled in the kernel
> 
>  Wow, i didn't know about GICv4.
> 
> Kind regards,
> Pavel Fedin
> Expert Engineer
> Samsung Electronics Research center Russia
> 
> 
> --
> To unsubscribe from this list: send the line "unsubscribe kvm" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 


  parent reply	other threads:[~2015-06-09  8:12 UTC|newest]

Thread overview: 104+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-29  9:53 [PATCH 00/13] arm64: KVM: GICv3 ITS emulation Andre Przywara
2015-05-29  9:53 ` Andre Przywara
2015-05-29  9:53 ` [PATCH 01/13] KVM: arm/arm64: VGIC: don't track used LRs in the distributor Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-12 17:23   ` Eric Auger
2015-05-29  9:53 ` [PATCH 02/13] KVM: extend struct kvm_msi to hold a 32-bit device ID Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-09  8:49   ` Eric Auger
2015-06-09  8:49     ` Eric Auger
2015-06-28 19:12   ` Christoffer Dall
2015-06-28 19:12     ` Christoffer Dall
2015-06-29 14:53     ` Andre Przywara
2015-06-29 14:53       ` Andre Przywara
2015-06-29 15:02       ` Christoffer Dall
2015-06-29 15:02         ` Christoffer Dall
2015-05-29  9:53 ` [PATCH 03/13] KVM: arm/arm64: add emulation model specific destroy function Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-09  8:51   ` Eric Auger
2015-06-09  8:51     ` Eric Auger
2015-06-28 19:14   ` Christoffer Dall
2015-06-28 19:14     ` Christoffer Dall
2015-05-29  9:53 ` [PATCH 04/13] KVM: arm64: Introduce new MMIO region for the ITS base address Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-09  8:52   ` Eric Auger
2015-06-09  8:52     ` Eric Auger
2015-06-11 15:12     ` Andre Przywara
2015-06-11 15:12       ` Andre Przywara
2015-05-29  9:53 ` [PATCH 05/13] KVM: arm64: handle ITS related GICv3 redistributor registers Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-09  8:52   ` Eric Auger
2015-06-09  8:52     ` Eric Auger
2015-06-12 17:03     ` Andre Przywara
2015-06-12 17:03       ` Andre Przywara
2015-05-29  9:53 ` [PATCH 06/13] KVM: arm64: introduce ITS emulation file with stub functions Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-09  9:23   ` Eric Auger
2015-06-09  9:23     ` Eric Auger
2015-05-29  9:53 ` [PATCH 07/13] KVM: arm64: implement basic ITS register handlers Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-09 13:34   ` Eric Auger
2015-06-09 13:34     ` Eric Auger
2015-06-28 19:36   ` Christoffer Dall
2015-06-28 19:36     ` Christoffer Dall
2015-05-29  9:53 ` [PATCH 08/13] KVM: arm64: add data structures to model ITS interrupt translation Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-09 15:59   ` Eric Auger
2015-06-09 15:59     ` Eric Auger
2015-05-29  9:53 ` [PATCH 09/13] KVM: arm64: handle pending bit for LPIs in ITS emulation Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-09 15:59   ` Eric Auger
2015-06-09 15:59     ` Eric Auger
2015-06-11 15:46     ` Andre Przywara
2015-06-11 15:46       ` Andre Przywara
2015-06-11 16:01       ` Marc Zyngier
2015-06-11 16:01         ` Marc Zyngier
2015-06-11 18:24         ` Eric Auger
2015-06-11 18:24           ` Eric Auger
2015-05-29  9:53 ` [PATCH 10/13] KVM: arm64: sync LPI properties and status between guest and KVM Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-11 17:44   ` Eric Auger
2015-06-11 17:44     ` Eric Auger
2015-06-28 19:33   ` Christoffer Dall
2015-06-28 19:33     ` Christoffer Dall
2015-05-29  9:53 ` [PATCH 11/13] KVM: arm64: implement ITS command queue command handlers Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-12 15:28   ` Eric Auger
2015-06-12 15:28     ` Eric Auger
2015-06-28 19:41   ` Christoffer Dall
2015-06-28 19:41     ` Christoffer Dall
2015-07-03 15:57     ` Andre Przywara
2015-07-03 15:57       ` Andre Przywara
2015-07-03 21:01       ` Christoffer Dall
2015-07-03 21:01         ` Christoffer Dall
2015-05-29  9:53 ` [PATCH 12/13] KVM: arm64: implement MSI injection in ITS emulation Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-11 17:43   ` Eric Auger
2015-06-11 17:43     ` Eric Auger
2015-07-06 16:46     ` Andre Przywara
2015-07-06 16:46       ` Andre Przywara
2015-07-07  8:13       ` Christoffer Dall
2015-07-07  8:13         ` Christoffer Dall
2015-05-29  9:53 ` [PATCH 13/13] KVM: arm64: enable ITS emulation as a virtual MSI controller Andre Przywara
2015-05-29  9:53   ` Andre Przywara
2015-06-12 16:05   ` Eric Auger
2015-06-12 16:05     ` Eric Auger
2015-06-18  8:43   ` Eric Auger
2015-06-18  8:43     ` Eric Auger
2015-06-18 14:22     ` Andre Przywara
2015-06-18 14:22       ` Andre Przywara
2015-06-18 15:03       ` Pavel Fedin
2015-06-18 15:03         ` Pavel Fedin
2015-06-18 19:20         ` Andre Przywara
2015-06-18 19:20           ` Andre Przywara
2015-06-08  6:53 ` [PATCH 00/13] arm64: KVM: GICv3 ITS emulation Pavel Fedin
2015-06-08  6:53   ` Pavel Fedin
2015-06-08  8:23   ` Marc Zyngier
2015-06-08  8:23     ` Marc Zyngier
2015-06-08 10:54     ` Pavel Fedin
2015-06-08 10:54       ` Pavel Fedin
2015-06-08 17:13       ` Marc Zyngier
2015-06-08 17:13         ` Marc Zyngier
2015-06-09  8:12       ` Eric Auger [this message]
2015-06-09  8:12         ` Eric Auger
2015-06-10 12:18 ` Pavel Fedin

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