From: eric.auger@linaro.org (Eric Auger)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 12/13] KVM: arm64: implement MSI injection in ITS emulation
Date: Thu, 11 Jun 2015 19:43:06 +0200 [thread overview]
Message-ID: <5579C8AA.8010903@linaro.org> (raw)
In-Reply-To: <1432893209-27313-13-git-send-email-andre.przywara@arm.com>
Hello Andre,
On 05/29/2015 11:53 AM, Andre Przywara wrote:
> When userland wants to inject a MSI into the guest, we have to use
> our data structures to find the LPI number and the VCPU to receivce
receive
> the interrupt.
> Use the wrapper functions to iterate the linked lists and find the
> proper Interrupt Translation Table Entry. Then set the pending bit
> in this ITTE to be later picked up by the LR handling code. Kick
> the VCPU which is meant to handle this interrupt.
> We provide a VGIC emulation model specific routine for the actual
> MSI injection. The wrapper functions return an error for models not
> (yet) implementing MSIs (like the GICv2 emulation).
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> include/kvm/arm_vgic.h | 1 +
> virt/kvm/arm/its-emul.c | 49 +++++++++++++++++++++++++++++++++++++++++++++
> virt/kvm/arm/its-emul.h | 2 ++
> virt/kvm/arm/vgic-v3-emul.c | 1 +
> 4 files changed, 53 insertions(+)
>
> diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
> index de19c34..6bb138d 100644
> --- a/include/kvm/arm_vgic.h
> +++ b/include/kvm/arm_vgic.h
> @@ -149,6 +149,7 @@ struct vgic_vm_ops {
> int (*map_resources)(struct kvm *, const struct vgic_params *);
> bool (*queue_lpis)(struct kvm_vcpu *);
> void (*unqueue_lpi)(struct kvm_vcpu *, int irq);
> + int (*inject_msi)(struct kvm *, struct kvm_msi *);
> };
>
> struct vgic_io_device {
> diff --git a/virt/kvm/arm/its-emul.c b/virt/kvm/arm/its-emul.c
> index 574cf05..35e886c 100644
> --- a/virt/kvm/arm/its-emul.c
> +++ b/virt/kvm/arm/its-emul.c
> @@ -340,6 +340,55 @@ static bool handle_mmio_gits_idregs(struct kvm_vcpu *vcpu,
> }
>
> /*
> + * Translates an incoming MSI request into the redistributor (=VCPU) and
> + * the associated LPI number. Sets the LPI pending bit and also marks the
> + * VCPU as having a pending interrupt.
> + */
> +int vits_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
> +{
> + struct vgic_dist *dist = &kvm->arch.vgic;
> + struct vgic_its *its = &dist->its;
> + struct its_itte *itte;
> + int cpuid;
> + bool inject = false;
> + int ret = 0;
> +
> + if (!vgic_has_its(kvm))
> + return -ENODEV;
> +
> + if (!(msi->flags & KVM_MSI_VALID_DEVID))
> + return -EINVAL;
> +
> + spin_lock(&its->lock);
> +
> + if (!its->enabled || !dist->lpis_enabled) {
> + ret = -EAGAIN;
> + goto out_unlock;
> + }
> +
> + itte = find_itte(kvm, msi->devid, msi->data);
> + /* Triggering an unmapped IRQ gets silently dropped. */
> + if (!itte || !itte->collection)
> + goto out_unlock;
> +
> + cpuid = itte->collection->target_addr;
> + set_bit(cpuid, itte->pending);
so now the internal state is different from the pending state in ext
memory. I don't really understand where the ext mem is used?
> + inject = itte->enabled;
> +
> +out_unlock:
> + spin_unlock(&its->lock);
> +
> + if (inject) {
> + spin_lock(&dist->lock);
> + set_bit(cpuid, dist->irq_pending_on_cpu);
isn't it atomic op?
Best Regards
Eric
> + spin_unlock(&dist->lock);
> + kvm_vcpu_kick(kvm_get_vcpu(kvm, cpuid));
> + }
> +
> + return ret;
> +}
> +
> +/*
> * Find all enabled and pending LPIs and queue them into the list
> * registers.
> * The dist lock is held by the caller.
> diff --git a/virt/kvm/arm/its-emul.h b/virt/kvm/arm/its-emul.h
> index 6152d04..cac1406 100644
> --- a/virt/kvm/arm/its-emul.h
> +++ b/virt/kvm/arm/its-emul.h
> @@ -33,6 +33,8 @@ void vgic_enable_lpis(struct kvm_vcpu *vcpu);
> int vits_init(struct kvm *kvm);
> void vits_destroy(struct kvm *kvm);
>
> +int vits_inject_msi(struct kvm *kvm, struct kvm_msi *msi);
> +
> bool vits_queue_lpis(struct kvm_vcpu *vcpu);
> void vits_unqueue_lpi(struct kvm_vcpu *vcpu, int irq);
>
> diff --git a/virt/kvm/arm/vgic-v3-emul.c b/virt/kvm/arm/vgic-v3-emul.c
> index 66640c2fa..4513551 100644
> --- a/virt/kvm/arm/vgic-v3-emul.c
> +++ b/virt/kvm/arm/vgic-v3-emul.c
> @@ -901,6 +901,7 @@ void vgic_v3_init_emulation(struct kvm *kvm)
> dist->vm_ops.init_model = vgic_v3_init_model;
> dist->vm_ops.destroy_model = vgic_v3_destroy_model;
> dist->vm_ops.map_resources = vgic_v3_map_resources;
> + dist->vm_ops.inject_msi = vits_inject_msi;
> dist->vm_ops.queue_lpis = vits_queue_lpis;
> dist->vm_ops.unqueue_lpi = vits_unqueue_lpi;
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Eric Auger <eric.auger@linaro.org>
To: Andre Przywara <andre.przywara@arm.com>,
christoffer.dall@linaro.org, marc.zyngier@arm.com
Cc: kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Subject: Re: [PATCH 12/13] KVM: arm64: implement MSI injection in ITS emulation
Date: Thu, 11 Jun 2015 19:43:06 +0200 [thread overview]
Message-ID: <5579C8AA.8010903@linaro.org> (raw)
In-Reply-To: <1432893209-27313-13-git-send-email-andre.przywara@arm.com>
Hello Andre,
On 05/29/2015 11:53 AM, Andre Przywara wrote:
> When userland wants to inject a MSI into the guest, we have to use
> our data structures to find the LPI number and the VCPU to receivce
receive
> the interrupt.
> Use the wrapper functions to iterate the linked lists and find the
> proper Interrupt Translation Table Entry. Then set the pending bit
> in this ITTE to be later picked up by the LR handling code. Kick
> the VCPU which is meant to handle this interrupt.
> We provide a VGIC emulation model specific routine for the actual
> MSI injection. The wrapper functions return an error for models not
> (yet) implementing MSIs (like the GICv2 emulation).
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> include/kvm/arm_vgic.h | 1 +
> virt/kvm/arm/its-emul.c | 49 +++++++++++++++++++++++++++++++++++++++++++++
> virt/kvm/arm/its-emul.h | 2 ++
> virt/kvm/arm/vgic-v3-emul.c | 1 +
> 4 files changed, 53 insertions(+)
>
> diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
> index de19c34..6bb138d 100644
> --- a/include/kvm/arm_vgic.h
> +++ b/include/kvm/arm_vgic.h
> @@ -149,6 +149,7 @@ struct vgic_vm_ops {
> int (*map_resources)(struct kvm *, const struct vgic_params *);
> bool (*queue_lpis)(struct kvm_vcpu *);
> void (*unqueue_lpi)(struct kvm_vcpu *, int irq);
> + int (*inject_msi)(struct kvm *, struct kvm_msi *);
> };
>
> struct vgic_io_device {
> diff --git a/virt/kvm/arm/its-emul.c b/virt/kvm/arm/its-emul.c
> index 574cf05..35e886c 100644
> --- a/virt/kvm/arm/its-emul.c
> +++ b/virt/kvm/arm/its-emul.c
> @@ -340,6 +340,55 @@ static bool handle_mmio_gits_idregs(struct kvm_vcpu *vcpu,
> }
>
> /*
> + * Translates an incoming MSI request into the redistributor (=VCPU) and
> + * the associated LPI number. Sets the LPI pending bit and also marks the
> + * VCPU as having a pending interrupt.
> + */
> +int vits_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
> +{
> + struct vgic_dist *dist = &kvm->arch.vgic;
> + struct vgic_its *its = &dist->its;
> + struct its_itte *itte;
> + int cpuid;
> + bool inject = false;
> + int ret = 0;
> +
> + if (!vgic_has_its(kvm))
> + return -ENODEV;
> +
> + if (!(msi->flags & KVM_MSI_VALID_DEVID))
> + return -EINVAL;
> +
> + spin_lock(&its->lock);
> +
> + if (!its->enabled || !dist->lpis_enabled) {
> + ret = -EAGAIN;
> + goto out_unlock;
> + }
> +
> + itte = find_itte(kvm, msi->devid, msi->data);
> + /* Triggering an unmapped IRQ gets silently dropped. */
> + if (!itte || !itte->collection)
> + goto out_unlock;
> +
> + cpuid = itte->collection->target_addr;
> + set_bit(cpuid, itte->pending);
so now the internal state is different from the pending state in ext
memory. I don't really understand where the ext mem is used?
> + inject = itte->enabled;
> +
> +out_unlock:
> + spin_unlock(&its->lock);
> +
> + if (inject) {
> + spin_lock(&dist->lock);
> + set_bit(cpuid, dist->irq_pending_on_cpu);
isn't it atomic op?
Best Regards
Eric
> + spin_unlock(&dist->lock);
> + kvm_vcpu_kick(kvm_get_vcpu(kvm, cpuid));
> + }
> +
> + return ret;
> +}
> +
> +/*
> * Find all enabled and pending LPIs and queue them into the list
> * registers.
> * The dist lock is held by the caller.
> diff --git a/virt/kvm/arm/its-emul.h b/virt/kvm/arm/its-emul.h
> index 6152d04..cac1406 100644
> --- a/virt/kvm/arm/its-emul.h
> +++ b/virt/kvm/arm/its-emul.h
> @@ -33,6 +33,8 @@ void vgic_enable_lpis(struct kvm_vcpu *vcpu);
> int vits_init(struct kvm *kvm);
> void vits_destroy(struct kvm *kvm);
>
> +int vits_inject_msi(struct kvm *kvm, struct kvm_msi *msi);
> +
> bool vits_queue_lpis(struct kvm_vcpu *vcpu);
> void vits_unqueue_lpi(struct kvm_vcpu *vcpu, int irq);
>
> diff --git a/virt/kvm/arm/vgic-v3-emul.c b/virt/kvm/arm/vgic-v3-emul.c
> index 66640c2fa..4513551 100644
> --- a/virt/kvm/arm/vgic-v3-emul.c
> +++ b/virt/kvm/arm/vgic-v3-emul.c
> @@ -901,6 +901,7 @@ void vgic_v3_init_emulation(struct kvm *kvm)
> dist->vm_ops.init_model = vgic_v3_init_model;
> dist->vm_ops.destroy_model = vgic_v3_destroy_model;
> dist->vm_ops.map_resources = vgic_v3_map_resources;
> + dist->vm_ops.inject_msi = vits_inject_msi;
> dist->vm_ops.queue_lpis = vits_queue_lpis;
> dist->vm_ops.unqueue_lpi = vits_unqueue_lpi;
>
>
next prev parent reply other threads:[~2015-06-11 17:43 UTC|newest]
Thread overview: 104+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-29 9:53 [PATCH 00/13] arm64: KVM: GICv3 ITS emulation Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-05-29 9:53 ` [PATCH 01/13] KVM: arm/arm64: VGIC: don't track used LRs in the distributor Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-12 17:23 ` Eric Auger
2015-05-29 9:53 ` [PATCH 02/13] KVM: extend struct kvm_msi to hold a 32-bit device ID Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-09 8:49 ` Eric Auger
2015-06-09 8:49 ` Eric Auger
2015-06-28 19:12 ` Christoffer Dall
2015-06-28 19:12 ` Christoffer Dall
2015-06-29 14:53 ` Andre Przywara
2015-06-29 14:53 ` Andre Przywara
2015-06-29 15:02 ` Christoffer Dall
2015-06-29 15:02 ` Christoffer Dall
2015-05-29 9:53 ` [PATCH 03/13] KVM: arm/arm64: add emulation model specific destroy function Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-09 8:51 ` Eric Auger
2015-06-09 8:51 ` Eric Auger
2015-06-28 19:14 ` Christoffer Dall
2015-06-28 19:14 ` Christoffer Dall
2015-05-29 9:53 ` [PATCH 04/13] KVM: arm64: Introduce new MMIO region for the ITS base address Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-09 8:52 ` Eric Auger
2015-06-09 8:52 ` Eric Auger
2015-06-11 15:12 ` Andre Przywara
2015-06-11 15:12 ` Andre Przywara
2015-05-29 9:53 ` [PATCH 05/13] KVM: arm64: handle ITS related GICv3 redistributor registers Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-09 8:52 ` Eric Auger
2015-06-09 8:52 ` Eric Auger
2015-06-12 17:03 ` Andre Przywara
2015-06-12 17:03 ` Andre Przywara
2015-05-29 9:53 ` [PATCH 06/13] KVM: arm64: introduce ITS emulation file with stub functions Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-09 9:23 ` Eric Auger
2015-06-09 9:23 ` Eric Auger
2015-05-29 9:53 ` [PATCH 07/13] KVM: arm64: implement basic ITS register handlers Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-09 13:34 ` Eric Auger
2015-06-09 13:34 ` Eric Auger
2015-06-28 19:36 ` Christoffer Dall
2015-06-28 19:36 ` Christoffer Dall
2015-05-29 9:53 ` [PATCH 08/13] KVM: arm64: add data structures to model ITS interrupt translation Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-09 15:59 ` Eric Auger
2015-06-09 15:59 ` Eric Auger
2015-05-29 9:53 ` [PATCH 09/13] KVM: arm64: handle pending bit for LPIs in ITS emulation Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-09 15:59 ` Eric Auger
2015-06-09 15:59 ` Eric Auger
2015-06-11 15:46 ` Andre Przywara
2015-06-11 15:46 ` Andre Przywara
2015-06-11 16:01 ` Marc Zyngier
2015-06-11 16:01 ` Marc Zyngier
2015-06-11 18:24 ` Eric Auger
2015-06-11 18:24 ` Eric Auger
2015-05-29 9:53 ` [PATCH 10/13] KVM: arm64: sync LPI properties and status between guest and KVM Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-11 17:44 ` Eric Auger
2015-06-11 17:44 ` Eric Auger
2015-06-28 19:33 ` Christoffer Dall
2015-06-28 19:33 ` Christoffer Dall
2015-05-29 9:53 ` [PATCH 11/13] KVM: arm64: implement ITS command queue command handlers Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-12 15:28 ` Eric Auger
2015-06-12 15:28 ` Eric Auger
2015-06-28 19:41 ` Christoffer Dall
2015-06-28 19:41 ` Christoffer Dall
2015-07-03 15:57 ` Andre Przywara
2015-07-03 15:57 ` Andre Przywara
2015-07-03 21:01 ` Christoffer Dall
2015-07-03 21:01 ` Christoffer Dall
2015-05-29 9:53 ` [PATCH 12/13] KVM: arm64: implement MSI injection in ITS emulation Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-11 17:43 ` Eric Auger [this message]
2015-06-11 17:43 ` Eric Auger
2015-07-06 16:46 ` Andre Przywara
2015-07-06 16:46 ` Andre Przywara
2015-07-07 8:13 ` Christoffer Dall
2015-07-07 8:13 ` Christoffer Dall
2015-05-29 9:53 ` [PATCH 13/13] KVM: arm64: enable ITS emulation as a virtual MSI controller Andre Przywara
2015-05-29 9:53 ` Andre Przywara
2015-06-12 16:05 ` Eric Auger
2015-06-12 16:05 ` Eric Auger
2015-06-18 8:43 ` Eric Auger
2015-06-18 8:43 ` Eric Auger
2015-06-18 14:22 ` Andre Przywara
2015-06-18 14:22 ` Andre Przywara
2015-06-18 15:03 ` Pavel Fedin
2015-06-18 15:03 ` Pavel Fedin
2015-06-18 19:20 ` Andre Przywara
2015-06-18 19:20 ` Andre Przywara
2015-06-08 6:53 ` [PATCH 00/13] arm64: KVM: GICv3 ITS emulation Pavel Fedin
2015-06-08 6:53 ` Pavel Fedin
2015-06-08 8:23 ` Marc Zyngier
2015-06-08 8:23 ` Marc Zyngier
2015-06-08 10:54 ` Pavel Fedin
2015-06-08 10:54 ` Pavel Fedin
2015-06-08 17:13 ` Marc Zyngier
2015-06-08 17:13 ` Marc Zyngier
2015-06-09 8:12 ` Eric Auger
2015-06-09 8:12 ` Eric Auger
2015-06-10 12:18 ` Pavel Fedin
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