From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/10] KVM: arm/arm64: vgic: Allow HW irq to be encoded in LR
Date: Tue, 09 Jun 2015 15:03:43 +0100 [thread overview]
Message-ID: <5576F23F.8010805@arm.com> (raw)
In-Reply-To: <87sia16mr3.fsf@linaro.org>
On 09/06/15 14:21, Alex Benn?e wrote:
>
> Marc Zyngier <marc.zyngier@arm.com> writes:
>
>> Now that struct vgic_lr supports the LR_HW bit and carries a hwirq
>> field, we can encode that information into the list registers.
>>
>> This patch provides implementations for both GICv2 and GICv3.
>>
>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>> ---
>> include/linux/irqchip/arm-gic-v3.h | 3 +++
>> include/linux/irqchip/arm-gic.h | 3 ++-
>> virt/kvm/arm/vgic-v2.c | 16 +++++++++++++++-
>> virt/kvm/arm/vgic-v3.c | 21 ++++++++++++++++++---
>> 4 files changed, 38 insertions(+), 5 deletions(-)
>>
>> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
>> index ffbc034..cf637d6 100644
> <snip>
>> @@ -84,10 +88,17 @@ static void vgic_v3_set_lr(struct kvm_vcpu *vcpu, int lr,
>> * Eventually we want to make this configurable, so we may revisit
>> * this in the future.
>> */
>> - if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
>> + switch (vcpu->kvm->arch.vgic.vgic_model) {
>> + case KVM_DEV_TYPE_ARM_VGIC_V3:
>> lr_val |= ICH_LR_GROUP;
>> - else
>> - lr_val |= (u32)lr_desc.source << GICH_LR_PHYSID_CPUID_SHIFT;
>> + break;
>> + case KVM_DEV_TYPE_ARM_VGIC_V2:
>> + if (lr_desc.irq < VGIC_NR_SGIS)
>> + lr_val |= (u32)lr_desc.source << GICH_LR_PHYSID_CPUID_SHIFT;
>> + break;
>> + default:
>> + BUG();
>> + }
>>
>> if (lr_desc.state & LR_STATE_PENDING)
>> lr_val |= ICH_LR_PENDING_BIT;
>> @@ -95,6 +106,10 @@ static void vgic_v3_set_lr(struct kvm_vcpu *vcpu, int lr,
>> lr_val |= ICH_LR_ACTIVE_BIT;
>> if (lr_desc.state & LR_EOI_INT)
>> lr_val |= ICH_LR_EOI;
>> + if (lr_desc.state & LR_HW) {
>> + lr_val |= ICH_LR_HW;
>> + lr_val |= ((u64)lr_desc.hwirq) << ICH_LR_PHYS_ID_SHIFT;
>> + }
>>
>
> Why is the bracketing different for the casting of lr_desc.hwirq
> compared to lr_desc.source. Surely the precedence of up-casting before
> the shift is the same in both cases?
Probably a leftover from a previous refactor...
Thanks,
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Christoffer Dall <christoffer.dall@linaro.org>,
Eric Auger <eric.auger@linaro.org>,
Andre Przywara <Andre.Przywara@arm.com>
Subject: Re: [PATCH 04/10] KVM: arm/arm64: vgic: Allow HW irq to be encoded in LR
Date: Tue, 09 Jun 2015 15:03:43 +0100 [thread overview]
Message-ID: <5576F23F.8010805@arm.com> (raw)
In-Reply-To: <87sia16mr3.fsf@linaro.org>
On 09/06/15 14:21, Alex Bennée wrote:
>
> Marc Zyngier <marc.zyngier@arm.com> writes:
>
>> Now that struct vgic_lr supports the LR_HW bit and carries a hwirq
>> field, we can encode that information into the list registers.
>>
>> This patch provides implementations for both GICv2 and GICv3.
>>
>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>> ---
>> include/linux/irqchip/arm-gic-v3.h | 3 +++
>> include/linux/irqchip/arm-gic.h | 3 ++-
>> virt/kvm/arm/vgic-v2.c | 16 +++++++++++++++-
>> virt/kvm/arm/vgic-v3.c | 21 ++++++++++++++++++---
>> 4 files changed, 38 insertions(+), 5 deletions(-)
>>
>> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
>> index ffbc034..cf637d6 100644
> <snip>
>> @@ -84,10 +88,17 @@ static void vgic_v3_set_lr(struct kvm_vcpu *vcpu, int lr,
>> * Eventually we want to make this configurable, so we may revisit
>> * this in the future.
>> */
>> - if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
>> + switch (vcpu->kvm->arch.vgic.vgic_model) {
>> + case KVM_DEV_TYPE_ARM_VGIC_V3:
>> lr_val |= ICH_LR_GROUP;
>> - else
>> - lr_val |= (u32)lr_desc.source << GICH_LR_PHYSID_CPUID_SHIFT;
>> + break;
>> + case KVM_DEV_TYPE_ARM_VGIC_V2:
>> + if (lr_desc.irq < VGIC_NR_SGIS)
>> + lr_val |= (u32)lr_desc.source << GICH_LR_PHYSID_CPUID_SHIFT;
>> + break;
>> + default:
>> + BUG();
>> + }
>>
>> if (lr_desc.state & LR_STATE_PENDING)
>> lr_val |= ICH_LR_PENDING_BIT;
>> @@ -95,6 +106,10 @@ static void vgic_v3_set_lr(struct kvm_vcpu *vcpu, int lr,
>> lr_val |= ICH_LR_ACTIVE_BIT;
>> if (lr_desc.state & LR_EOI_INT)
>> lr_val |= ICH_LR_EOI;
>> + if (lr_desc.state & LR_HW) {
>> + lr_val |= ICH_LR_HW;
>> + lr_val |= ((u64)lr_desc.hwirq) << ICH_LR_PHYS_ID_SHIFT;
>> + }
>>
>
> Why is the bracketing different for the casting of lr_desc.hwirq
> compared to lr_desc.source. Surely the precedence of up-casting before
> the shift is the same in both cases?
Probably a leftover from a previous refactor...
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-06-09 14:03 UTC|newest]
Thread overview: 118+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-08 17:03 [PATCH 00/10] arm/arm64: KVM: Active interrupt state switching for shared devices Marc Zyngier
2015-06-08 17:03 ` Marc Zyngier
2015-06-08 17:03 ` [PATCH 01/10] arm/arm64: KVM: Fix ordering of timer/GIC on guest entry Marc Zyngier
2015-06-08 17:03 ` Marc Zyngier
2015-06-09 11:29 ` Alex Bennée
2015-06-09 11:29 ` Alex Bennée
2015-06-30 20:19 ` Christoffer Dall
2015-06-30 20:19 ` Christoffer Dall
2015-06-08 17:03 ` [PATCH 02/10] arm/arm64: KVM: Move vgic handling to a non-preemptible section Marc Zyngier
2015-06-08 17:03 ` Marc Zyngier
2015-06-09 11:38 ` Alex Bennée
2015-06-09 11:38 ` Alex Bennée
2015-06-30 20:19 ` Christoffer Dall
2015-06-30 20:19 ` Christoffer Dall
2015-06-08 17:03 ` [PATCH 03/10] KVM: arm/arm64: vgic: Convert struct vgic_lr to use bitfields Marc Zyngier
2015-06-08 17:03 ` Marc Zyngier
2015-06-09 13:12 ` Alex Bennée
2015-06-09 13:12 ` Alex Bennée
2015-06-10 17:23 ` Andre Przywara
2015-06-10 17:23 ` Andre Przywara
2015-06-10 18:04 ` Marc Zyngier
2015-06-10 18:04 ` Marc Zyngier
2015-06-08 17:03 ` [PATCH 04/10] KVM: arm/arm64: vgic: Allow HW irq to be encoded in LR Marc Zyngier
2015-06-08 17:03 ` Marc Zyngier
2015-06-09 13:21 ` Alex Bennée
2015-06-09 13:21 ` Alex Bennée
2015-06-09 14:03 ` Marc Zyngier [this message]
2015-06-09 14:03 ` Marc Zyngier
2015-06-17 11:53 ` Eric Auger
2015-06-17 11:53 ` Eric Auger
2015-06-17 12:39 ` Marc Zyngier
2015-06-17 12:39 ` Marc Zyngier
2015-06-17 13:21 ` Peter Maydell
2015-06-17 13:21 ` Peter Maydell
2015-06-17 13:34 ` Marc Zyngier
2015-06-17 13:34 ` Marc Zyngier
2015-06-08 17:04 ` [PATCH 05/10] KVM: arm/arm64: vgic: Relax vgic_can_sample_irq for edge IRQs Marc Zyngier
2015-06-08 17:04 ` Marc Zyngier
2015-06-30 20:19 ` Christoffer Dall
2015-06-30 20:19 ` Christoffer Dall
2015-07-01 9:17 ` Marc Zyngier
2015-07-01 9:17 ` Marc Zyngier
2015-07-01 11:58 ` Christoffer Dall
2015-07-01 11:58 ` Christoffer Dall
2015-07-01 18:18 ` Marc Zyngier
2015-07-01 18:18 ` Marc Zyngier
2015-07-02 16:23 ` Christoffer Dall
2015-07-02 16:23 ` Christoffer Dall
2015-07-03 9:50 ` Marc Zyngier
2015-07-03 9:50 ` Marc Zyngier
2015-07-03 9:57 ` Peter Maydell
2015-07-03 9:57 ` Peter Maydell
2015-06-08 17:04 ` [PATCH 06/10] KVM: arm/arm64: vgic: Allow dynamic mapping of physical/virtual interrupts Marc Zyngier
2015-06-08 17:04 ` Marc Zyngier
2015-06-11 8:43 ` Andre Przywara
2015-06-11 8:43 ` Andre Przywara
2015-06-11 8:56 ` Marc Zyngier
2015-06-11 8:56 ` Marc Zyngier
2015-06-15 15:44 ` Eric Auger
2015-06-15 15:44 ` Eric Auger
2015-06-16 8:28 ` Marc Zyngier
2015-06-16 8:28 ` Marc Zyngier
2015-06-16 9:10 ` Eric Auger
2015-06-16 9:10 ` Eric Auger
2015-06-30 20:19 ` Christoffer Dall
2015-06-30 20:19 ` Christoffer Dall
2015-07-01 10:20 ` Marc Zyngier
2015-07-01 10:20 ` Marc Zyngier
2015-07-01 11:45 ` Christoffer Dall
2015-07-01 11:45 ` Christoffer Dall
2015-06-08 17:04 ` [PATCH 07/10] KVM: arm/arm64: vgic: Allow HW interrupts to be queued to a guest Marc Zyngier
2015-06-08 17:04 ` Marc Zyngier
2015-06-11 8:44 ` Andre Przywara
2015-06-11 8:44 ` Andre Przywara
2015-06-11 9:15 ` Marc Zyngier
2015-06-11 9:15 ` Marc Zyngier
2015-06-11 9:44 ` Andre Przywara
2015-06-11 9:44 ` Andre Przywara
2015-06-11 10:02 ` Marc Zyngier
2015-06-11 10:02 ` Marc Zyngier
2015-06-15 16:11 ` Eric Auger
2015-06-15 16:11 ` Eric Auger
2015-06-17 11:51 ` Eric Auger
2015-06-17 11:51 ` Eric Auger
2015-06-17 12:23 ` Marc Zyngier
2015-06-17 12:23 ` Marc Zyngier
2015-06-08 17:04 ` [PATCH 08/10] KVM: arm/arm64: vgic: Add vgic_{get, set}_phys_irq_active Marc Zyngier
2015-06-08 17:04 ` [PATCH 08/10] KVM: arm/arm64: vgic: Add vgic_{get,set}_phys_irq_active Marc Zyngier
2015-06-17 15:11 ` [PATCH 08/10] KVM: arm/arm64: vgic: Add vgic_{get, set}_phys_irq_active Eric Auger
2015-06-17 15:11 ` [PATCH 08/10] KVM: arm/arm64: vgic: Add vgic_{get,set}_phys_irq_active Eric Auger
2015-06-08 17:04 ` [PATCH 09/10] KVM: arm/arm64: timer: Allow the timer to control the active state Marc Zyngier
2015-06-08 17:04 ` Marc Zyngier
2015-06-08 17:04 ` [PATCH 10/10] KVM: arm/arm64: vgic: Allow non-shared device HW interrupts Marc Zyngier
2015-06-08 17:04 ` Marc Zyngier
2015-06-17 15:11 ` Eric Auger
2015-06-17 15:11 ` Eric Auger
2015-06-17 15:37 ` Marc Zyngier
2015-06-17 15:37 ` Marc Zyngier
2015-06-17 15:50 ` Eric Auger
2015-06-17 15:50 ` Eric Auger
2015-06-18 8:37 ` Marc Zyngier
2015-06-18 8:37 ` Marc Zyngier
2015-06-18 17:51 ` Eric Auger
2015-06-18 17:51 ` Eric Auger
2015-06-30 20:19 ` Christoffer Dall
2015-06-30 20:19 ` Christoffer Dall
2015-07-01 8:26 ` Marc Zyngier
2015-07-01 8:26 ` Marc Zyngier
2015-07-01 8:57 ` Christoffer Dall
2015-07-01 8:57 ` Christoffer Dall
2015-06-10 8:33 ` [PATCH 00/10] arm/arm64: KVM: Active interrupt state switching for shared devices Eric Auger
2015-06-10 8:33 ` Eric Auger
2015-06-10 9:03 ` Marc Zyngier
2015-06-10 9:03 ` Marc Zyngier
2015-06-10 11:13 ` Eric Auger
2015-06-10 11:13 ` Eric Auger
2015-06-18 6:51 ` Eric Auger
2015-06-18 6:51 ` Eric Auger
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