From: Eric Anholt <eric@anholt.net>
To: Thomas Gleixner <tglx@linutronix.de>,
Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-rpi-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Lee Jones <lee@kernel.org>,
devicetree@vger.kernel.org, Jason Cooper <jason@lakedaemon.net>,
Andrea Merello <andrea.merello@gmail.com>
Subject: Re: [PATCH 4/4] irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2.
Date: Mon, 13 Jul 2015 09:06:10 -0700 [thread overview]
Message-ID: <878uakqbyl.fsf@eliezer.anholt.net> (raw)
In-Reply-To: <alpine.DEB.2.11.1507110940420.17353@nanos>
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Thomas Gleixner <tglx@linutronix.de> writes:
> On Fri, 10 Jul 2015, Stephen Warren wrote:
>> On 07/07/2015 03:13 PM, Eric Anholt wrote:
>> > +static void bcm2836_mask_per_cpu_irq(unsigned int reg, unsigned int bit)
>> > +{
>> > + void __iomem *reg_base = intc.base + reg;
>> > + unsigned int i;
>> > +
>> > + for (i = 0; i < 4; i++)
>>
>> Is "4" there the CPU count? Perhaps this should use one of the Linux
>> APIs to query the CPU count rather than hard-coding it?
>>
>> Should per-CPU IRQs automatically be masked on all CPUs at once, or only
>> on the current CPU? A very quick look at the ARM GIC driver implies it
>> doesn't iterate over all CPUs when masking per-CPU IRQs.
>
> Usually per cpu interrupts are only masked on the cpu which is calling
> the function. The whole reason why per cpu interrupts exist is that
> you can share the same interrupt number for all cores.
>
> So masking all interrupts is not a good idea. In this case if a cpu is
> hot unplugged, then all other cpus would not longer get timer
> interrupts. Not what you really want, right?
I was replicating the behavior of the downstream driver, but it seemed
suspicious. Converting to using smp_processor_id() to just mask/unmask
this CPU's interrupts seems to have gone fine.
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From: eric@anholt.net (Eric Anholt)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/4] irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2.
Date: Mon, 13 Jul 2015 09:06:10 -0700 [thread overview]
Message-ID: <878uakqbyl.fsf@eliezer.anholt.net> (raw)
In-Reply-To: <alpine.DEB.2.11.1507110940420.17353@nanos>
Thomas Gleixner <tglx@linutronix.de> writes:
> On Fri, 10 Jul 2015, Stephen Warren wrote:
>> On 07/07/2015 03:13 PM, Eric Anholt wrote:
>> > +static void bcm2836_mask_per_cpu_irq(unsigned int reg, unsigned int bit)
>> > +{
>> > + void __iomem *reg_base = intc.base + reg;
>> > + unsigned int i;
>> > +
>> > + for (i = 0; i < 4; i++)
>>
>> Is "4" there the CPU count? Perhaps this should use one of the Linux
>> APIs to query the CPU count rather than hard-coding it?
>>
>> Should per-CPU IRQs automatically be masked on all CPUs at once, or only
>> on the current CPU? A very quick look at the ARM GIC driver implies it
>> doesn't iterate over all CPUs when masking per-CPU IRQs.
>
> Usually per cpu interrupts are only masked on the cpu which is calling
> the function. The whole reason why per cpu interrupts exist is that
> you can share the same interrupt number for all cores.
>
> So masking all interrupts is not a good idea. In this case if a cpu is
> hot unplugged, then all other cpus would not longer get timer
> interrupts. Not what you really want, right?
I was replicating the behavior of the downstream driver, but it seemed
suspicious. Converting to using smp_processor_id() to just mask/unmask
this CPU's interrupts seems to have gone fine.
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next prev parent reply other threads:[~2015-07-13 16:06 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-07 21:13 Raspberry Pi 2 support, part 1: Interrupt controller Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-07 21:13 ` [PATCH 1/4] irqchip: bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-07 21:13 ` [PATCH 2/4] irqchip: bcm2835: If a parent interrupt is registered, chain from it Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-07 21:13 ` [PATCH 3/4] irqchip: Add documentation for the bcm2836 interrupt controller Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-11 4:57 ` Stephen Warren
2015-07-11 4:57 ` Stephen Warren
2015-07-11 4:57 ` Stephen Warren
2015-07-11 6:01 ` Eric Anholt
2015-07-11 6:01 ` Eric Anholt
2015-07-11 6:01 ` Eric Anholt
2015-07-14 5:08 ` Stephen Warren
2015-07-14 5:08 ` Stephen Warren
2015-07-14 5:08 ` Stephen Warren
2015-07-07 21:13 ` [PATCH 4/4] irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-07 21:13 ` Eric Anholt
2015-07-11 5:13 ` Stephen Warren
2015-07-11 5:13 ` Stephen Warren
2015-07-11 5:13 ` Stephen Warren
2015-07-11 7:51 ` Thomas Gleixner
2015-07-11 7:51 ` Thomas Gleixner
2015-07-11 7:51 ` Thomas Gleixner
2015-07-13 16:06 ` Eric Anholt [this message]
2015-07-13 16:06 ` Eric Anholt
2015-07-14 5:09 ` Stephen Warren
2015-07-14 5:09 ` Stephen Warren
2015-07-14 5:09 ` Stephen Warren
2015-07-13 18:48 ` Eric Anholt
2015-07-13 18:48 ` Eric Anholt
2015-07-13 18:48 ` Eric Anholt
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