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From: POPESCU Catalin <catalin.popescu@leica-geosystems.com>
To: "mturquette@baylibre.com" <mturquette@baylibre.com>,
	"sboyd@kernel.org" <sboyd@kernel.org>
Cc: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	GEO-CHHER-bsp-development
	<bsp-development.geo@leica-geosystems.com>,
	"m.felsch@pengutronix.de" <m.felsch@pengutronix.de>
Subject: Re: [PATCH next] clk: rs9: fix wrong default value for clock amplitude
Date: Fri, 22 Mar 2024 07:58:13 +0000	[thread overview]
Message-ID: <4181961d-9c38-4794-88c6-602cd5b6e6c6@leica-geosystems.com> (raw)
In-Reply-To: <20240306180435.1033052-1-catalin.popescu@leica-geosystems.com>

Ping :)

On 06/03/2024 19:04, Catalin Popescu wrote:
> According to 9FGV0241 & 9FGV0441 datasheets, the default value
> for the clock amplitude is 0.8V, while the driver was assuming
> 0.7V.
>
> Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com>
> ---
>   drivers/clk/clk-renesas-pcie.c | 10 ++++++----
>   1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/clk-renesas-pcie.c b/drivers/clk/clk-renesas-pcie.c
> index 53e21ac302e6..4c3a5e4eb77a 100644
> --- a/drivers/clk/clk-renesas-pcie.c
> +++ b/drivers/clk/clk-renesas-pcie.c
> @@ -25,10 +25,12 @@
>   #define RS9_REG_SS_AMP_0V7			0x1
>   #define RS9_REG_SS_AMP_0V8			0x2
>   #define RS9_REG_SS_AMP_0V9			0x3
> +#define RS9_REG_SS_AMP_DEFAULT			RS9_REG_SS_AMP_0V8
>   #define RS9_REG_SS_AMP_MASK			0x3
>   #define RS9_REG_SS_SSC_100			0
>   #define RS9_REG_SS_SSC_M025			(1 << 3)
>   #define RS9_REG_SS_SSC_M050			(3 << 3)
> +#define RS9_REG_SS_SSC_DEFAULT			RS9_REG_SS_SSC_100
>   #define RS9_REG_SS_SSC_MASK			(3 << 3)
>   #define RS9_REG_SS_SSC_LOCK			BIT(5)
>   #define RS9_REG_SR				0x2
> @@ -205,8 +207,8 @@ static int rs9_get_common_config(struct rs9_driver_data *rs9)
>   	int ret;
>   
>   	/* Set defaults */
> -	rs9->pll_amplitude = RS9_REG_SS_AMP_0V7;
> -	rs9->pll_ssc = RS9_REG_SS_SSC_100;
> +	rs9->pll_amplitude = RS9_REG_SS_AMP_DEFAULT;
> +	rs9->pll_ssc = RS9_REG_SS_SSC_DEFAULT;
>   
>   	/* Output clock amplitude */
>   	ret = of_property_read_u32(np, "renesas,out-amplitude-microvolt",
> @@ -247,13 +249,13 @@ static void rs9_update_config(struct rs9_driver_data *rs9)
>   	int i;
>   
>   	/* If amplitude is non-default, update it. */
> -	if (rs9->pll_amplitude != RS9_REG_SS_AMP_0V7) {
> +	if (rs9->pll_amplitude != RS9_REG_SS_AMP_DEFAULT) {
>   		regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_AMP_MASK,
>   				   rs9->pll_amplitude);
>   	}
>   
>   	/* If SSC is non-default, update it. */
> -	if (rs9->pll_ssc != RS9_REG_SS_SSC_100) {
> +	if (rs9->pll_ssc != RS9_REG_SS_SSC_DEFAULT) {
>   		regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_SSC_MASK,
>   				   rs9->pll_ssc);
>   	}
>
> base-commit: 61996c073c9b070922ad3a36c981ca6ddbea19a5
> prerequisite-patch-id: 0000000000000000000000000000000000000000



  reply	other threads:[~2024-03-22  7:58 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-06 18:04 [PATCH next] clk: rs9: fix wrong default value for clock amplitude Catalin Popescu
2024-03-22  7:58 ` POPESCU Catalin [this message]
2024-04-09  8:19 ` Stephen Boyd
2024-04-12 18:35   ` Marek Vasut
2024-04-15 12:39     ` POPESCU Catalin

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