From: POPESCU Catalin <catalin.popescu@leica-geosystems.com>
To: Marek Vasut <marex@denx.de>, Stephen Boyd <sboyd@kernel.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
GEO-CHHER-bsp-development
<bsp-development.geo@leica-geosystems.com>,
"m.felsch@pengutronix.de" <m.felsch@pengutronix.de>
Subject: Re: [PATCH next] clk: rs9: fix wrong default value for clock amplitude
Date: Mon, 15 Apr 2024 12:39:54 +0000 [thread overview]
Message-ID: <af1116d6-e615-410e-a2e1-344c3ae6c029@leica-geosystems.com> (raw)
In-Reply-To: <d55fce26-a96e-4653-a463-a277e232ed48@denx.de>
On 12/04/2024 20:35, Marek Vasut wrote:
> This email is not from Hexagon’s Office 365 instance. Please be
> careful while clicking links, opening attachments, or replying to this
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>
>
> On 4/9/24 10:19 AM, Stephen Boyd wrote:
>> Quoting Catalin Popescu (2024-03-06 10:04:35)
>>> According to 9FGV0241 & 9FGV0441 datasheets
>
> 9FGV0841 too.
>
>> , the default value
>>> for the clock amplitude is 0.8V, while the driver was assuming
>>> 0.7V.
>
> Can you also document the SCC spread spectrum change in the commit
> message ?
>
>>> Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com>
>
> This also needs
> Fixes: 892e0ddea1aa ("clk: rs9: Add Renesas 9-series PCIe clock
> generator driver")
>
> Thanks ! Sorry for the delayed reply.
No problem, thanks for the review.
prev parent reply other threads:[~2024-04-15 12:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-06 18:04 [PATCH next] clk: rs9: fix wrong default value for clock amplitude Catalin Popescu
2024-03-22 7:58 ` POPESCU Catalin
2024-04-09 8:19 ` Stephen Boyd
2024-04-12 18:35 ` Marek Vasut
2024-04-15 12:39 ` POPESCU Catalin [this message]
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