From: Marek Vasut <marex@denx.de>
To: Stephen Boyd <sboyd@kernel.org>,
Catalin Popescu <catalin.popescu@leica-geosystems.com>,
mturquette@baylibre.com, Biju Das <biju.das.jz@bp.renesas.com>,
Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
bsp-development.geo@leica-geosystems.com,
m.felsch@pengutronix.de
Subject: Re: [PATCH next] clk: rs9: fix wrong default value for clock amplitude
Date: Fri, 12 Apr 2024 20:35:09 +0200 [thread overview]
Message-ID: <d55fce26-a96e-4653-a463-a277e232ed48@denx.de> (raw)
In-Reply-To: <a5595ba92a3d65a222398824b09d7d37.sboyd@kernel.org>
On 4/9/24 10:19 AM, Stephen Boyd wrote:
> Quoting Catalin Popescu (2024-03-06 10:04:35)
>> According to 9FGV0241 & 9FGV0441 datasheets
9FGV0841 too.
>, the default value
>> for the clock amplitude is 0.8V, while the driver was assuming
>> 0.7V.
Can you also document the SCC spread spectrum change in the commit message ?
>> Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com>
This also needs
Fixes: 892e0ddea1aa ("clk: rs9: Add Renesas 9-series PCIe clock
generator driver")
Thanks ! Sorry for the delayed reply.
next prev parent reply other threads:[~2024-04-12 18:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-06 18:04 [PATCH next] clk: rs9: fix wrong default value for clock amplitude Catalin Popescu
2024-03-22 7:58 ` POPESCU Catalin
2024-04-09 8:19 ` Stephen Boyd
2024-04-12 18:35 ` Marek Vasut [this message]
2024-04-15 12:39 ` POPESCU Catalin
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