From: Krzysztof Adamski <k@japko.eu>
To: inus Walleij <linus.walleij@linaro.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
Jens Kuske <jenskuske@gmail.com>,
Fabian Frederick <fabf@skynet.be>,
Vishnu Patekar <vishnupatekar0510@gmail.com>,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Cc: Krzysztof Adamski <k@japko.eu>
Subject: [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set
Date: Thu, 4 Feb 2016 00:33:50 +0100 [thread overview]
Message-ID: <1454542430-16572-6-git-send-email-k@japko.eu> (raw)
In-Reply-To: <1454542430-16572-1-git-send-email-k@japko.eu>
sunxi_pmx_set accepts pin number and then calculates offset by
subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand,
gets offset so we have to convert it to pin number so we won't get
negative value in sunxi_pmx_set.
This was only used on A10 so far, where there is only one GPIO chip with
pin_base set to 0 so it didn't matter. However H3 also requires this
workaround but have two pinmux sections, triggering problem for PL port.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 7a2465f..96f64a1 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -459,15 +459,16 @@ static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset)
u8 index = sunxi_data_offset(offset);
u32 set_mux = pctl->desc->irq_read_needs_mux &&
test_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags);
+ u32 pin = offset + chip->base;
u32 val;
if (set_mux)
- sunxi_pmx_set(pctl->pctl_dev, offset, SUN4I_FUNC_INPUT);
+ sunxi_pmx_set(pctl->pctl_dev, pin, SUN4I_FUNC_INPUT);
val = (readl(pctl->membase + reg) >> index) & DATA_PINS_MASK;
if (set_mux)
- sunxi_pmx_set(pctl->pctl_dev, offset, SUN4I_FUNC_IRQ);
+ sunxi_pmx_set(pctl->pctl_dev, pin, SUN4I_FUNC_IRQ);
return !!val;
}
--
2.1.4
next prev parent reply other threads:[~2016-02-03 23:36 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-03 23:33 [PATCH v3 0/5] pinctrl: sunxi: Add H3 R_PIO controller support Krzysztof Adamski
2016-02-03 23:33 ` [PATCH v3 1/5] clk: sunxi: Add apb0 gates for H3 Krzysztof Adamski
2016-02-04 14:47 ` Jean-Francois Moine
2016-02-04 20:56 ` Krzysztof Adamski
2016-02-05 11:14 ` Maxime Ripard
2016-02-05 11:11 ` Maxime Ripard
2016-02-05 11:58 ` Krzysztof Adamski
2016-02-09 17:10 ` Maxime Ripard
2016-02-10 7:17 ` [linux-sunxi] " Krzysztof Adamski
2016-02-10 15:06 ` Maxime Ripard
2016-02-06 10:26 ` Jean-Francois Moine
2016-02-09 17:11 ` Maxime Ripard
2016-02-03 23:33 ` [PATCH v3 2/5] dts: sun8i-h3: Add APB0 related clocks and resets Krzysztof Adamski
2016-02-03 23:33 ` [PATCH v3 3/5] pinctrl: sunxi: Add H3 R_PIO controller support Krzysztof Adamski
2016-02-05 9:44 ` Chen-Yu Tsai
2016-02-05 9:46 ` Maxime Ripard
2016-02-03 23:33 ` [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi Krzysztof Adamski
2016-02-05 9:46 ` Chen-Yu Tsai
2016-02-08 8:39 ` Krzysztof Adamski
2016-02-03 23:33 ` Krzysztof Adamski [this message]
2016-02-05 9:45 ` [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set Chen-Yu Tsai
2016-02-05 11:15 ` Maxime Ripard
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