From: Conor Dooley <conor@kernel.org>
To: Charlie Jenkins <charlie@rivosinc.com>
Cc: "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Guo Ren" <guoren@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Evan Green" <evan@rivosinc.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <shuah@kernel.org>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
"Palmer Dabbelt" <palmer@rivosinc.com>,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v4 05/16] riscv: Extend cpufeature.c to detect vendor extensions
Date: Wed, 1 May 2024 12:40:38 +0100 [thread overview]
Message-ID: <20240501-drivable-deviation-0a493511770c@spud> (raw)
In-Reply-To: <20240426-dev-charlie-support_thead_vector_6_9-v4-5-b692f3c516ec@rivosinc.com>
[-- Attachment #1: Type: text/plain, Size: 1188 bytes --]
On Fri, Apr 26, 2024 at 02:29:19PM -0700, Charlie Jenkins wrote:
> Separate vendor extensions out into one struct per vendor
> instead of adding vendor extensions onto riscv_isa_ext.
>
> Add a hidden config RISCV_ISA_VENDOR_EXT to conditionally include this
> code.
>
> The xtheadvector vendor extension is added using these changes.
>
> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> ---
> arch/riscv/Kconfig | 2 +
> arch/riscv/Kconfig.vendor | 19 ++++++
> arch/riscv/include/asm/cpufeature.h | 18 ++++++
> arch/riscv/include/asm/vendor_extensions.h | 26 ++++++++
> arch/riscv/include/asm/vendor_extensions/thead.h | 19 ++++++
> arch/riscv/kernel/Makefile | 2 +
> arch/riscv/kernel/cpufeature.c | 77 ++++++++++++++++++------
> arch/riscv/kernel/vendor_extensions.c | 18 ++++++
> arch/riscv/kernel/vendor_extensions/Makefile | 3 +
> arch/riscv/kernel/vendor_extensions/thead.c | 36 +++++++++++
I see no modifications to cpu.c here, is it intentional that vendor
stuff isn't gonna show up in /proc/cpuinfo?
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
next prev parent reply other threads:[~2024-05-01 11:40 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-26 21:29 [PATCH v4 00/16] riscv: Support vendor extensions and xtheadvector Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 01/16] dt-bindings: riscv: Add xtheadvector ISA extension description Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 02/16] dt-bindings: riscv: cpus: add a vlen register length property Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 03/16] riscv: vector: Use vlenb from DT Charlie Jenkins
2024-05-01 10:31 ` Conor Dooley
2024-05-01 16:46 ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 04/16] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 05/16] riscv: Extend cpufeature.c to detect vendor extensions Charlie Jenkins
2024-05-01 10:46 ` Conor Dooley
2024-05-01 17:04 ` Charlie Jenkins
2024-05-01 11:19 ` Conor Dooley
2024-05-01 17:06 ` Charlie Jenkins
2024-05-01 11:40 ` Conor Dooley [this message]
2024-05-01 17:10 ` Charlie Jenkins
2024-05-01 17:12 ` Conor Dooley
2024-05-01 16:44 ` Evan Green
2024-05-01 17:19 ` Conor Dooley
2024-05-01 17:58 ` Charlie Jenkins
2024-05-01 17:51 ` Charlie Jenkins
2024-05-01 18:03 ` Conor Dooley
2024-05-01 18:09 ` Conor Dooley
2024-05-01 18:37 ` Charlie Jenkins
2024-05-01 18:05 ` Evan Green
2024-05-02 22:31 ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 06/16] riscv: Introduce vendor variants of extension helpers Charlie Jenkins
2024-05-01 11:29 ` Conor Dooley
2024-05-01 19:45 ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 07/16] riscv: cpufeature: Extract common elements from extension checking Charlie Jenkins
2024-05-01 11:37 ` Conor Dooley
2024-05-01 19:48 ` Charlie Jenkins
2024-05-01 20:15 ` Conor Dooley
2024-05-01 20:39 ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 08/16] riscv: Convert xandespmu to use the vendor extension framework Charlie Jenkins
2024-05-01 11:38 ` Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240501-drivable-deviation-0a493511770c@spud \
--to=conor@kernel.org \
--cc=aou@eecs.berkeley.edu \
--cc=charlie@rivosinc.com \
--cc=cleger@rivosinc.com \
--cc=conor+dt@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=corbet@lwn.net \
--cc=devicetree@vger.kernel.org \
--cc=evan@rivosinc.com \
--cc=guoren@kernel.org \
--cc=jernej.skrabec@gmail.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=palmer@dabbelt.com \
--cc=palmer@rivosinc.com \
--cc=paul.walmsley@sifive.com \
--cc=robh@kernel.org \
--cc=samuel@sholland.org \
--cc=shuah@kernel.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).