From: Conor Dooley <conor@kernel.org>
To: Charlie Jenkins <charlie@rivosinc.com>
Cc: "Evan Green" <evan@rivosinc.com>, "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Guo Ren" <guoren@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <shuah@kernel.org>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
"Palmer Dabbelt" <palmer@rivosinc.com>,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v4 05/16] riscv: Extend cpufeature.c to detect vendor extensions
Date: Wed, 1 May 2024 19:09:28 +0100 [thread overview]
Message-ID: <20240501-moneyless-shifter-a54bbaecc4e7@spud> (raw)
In-Reply-To: <20240501-banner-sniff-4c5958eb15ef@spud>
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On Wed, May 01, 2024 at 07:03:46PM +0100, Conor Dooley wrote:
> On Wed, May 01, 2024 at 10:51:38AM -0700, Charlie Jenkins wrote:
> > On Wed, May 01, 2024 at 09:44:15AM -0700, Evan Green wrote:
> > > On Fri, Apr 26, 2024 at 2:29 PM Charlie Jenkins <charlie@rivosinc.com> wrote:
> > > > + for (int i = 0; i < riscv_isa_vendor_ext_list_size; i++) {
> > > > + const struct riscv_isa_vendor_ext_data_list *ext_list = riscv_isa_vendor_ext_list[i];
> > > > +
> > > > + if (bitmap_empty(ext_list->vendor_bitmap, ext_list->bitmap_size))
> > > > + bitmap_copy(ext_list->vendor_bitmap,
> > > > + ext_list->per_hart_vendor_bitmap[cpu].isa,
> > > > + ext_list->bitmap_size);
> > >
> > > Could you get into trouble here if the set of vendor extensions
> > > reduces to zero, and then becomes non-zero? To illustrate, consider
> > > these masks:
> > > cpu 0: 0x0000C000
> > > cpu 1: 0x00000003 <<< vendor_bitmap ANDs out to 0
> > > cpu 2: 0x00000010 <<< oops, we end up copying this into vendor_bitmap
> > >
> >
> > Huh that's a good point. The standard extensions have that same bug too?
> >
> > if (bitmap_empty(riscv_isa, RISCV_ISA_EXT_MAX))
> > bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX);
> > else
> > bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX);
>
> I suppose it could in theory, but the boot hart needs ima to even get
> this far. I think you'd only end up with this happening if there were
> enabled harts that supported rvXXe, but I don't think we even add those
> to the possible set of CPUs. I'll have to check.
Ye, you don't get marked possible if you don't have ima, so I don't
think this is possible to have happen. Maybe a comment here is
sufficient, explaining why this cannot reduce to zeros?
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next prev parent reply other threads:[~2024-05-01 18:09 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-26 21:29 [PATCH v4 00/16] riscv: Support vendor extensions and xtheadvector Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 01/16] dt-bindings: riscv: Add xtheadvector ISA extension description Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 02/16] dt-bindings: riscv: cpus: add a vlen register length property Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 03/16] riscv: vector: Use vlenb from DT Charlie Jenkins
2024-05-01 10:31 ` Conor Dooley
2024-05-01 16:46 ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 04/16] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 05/16] riscv: Extend cpufeature.c to detect vendor extensions Charlie Jenkins
2024-05-01 10:46 ` Conor Dooley
2024-05-01 17:04 ` Charlie Jenkins
2024-05-01 11:19 ` Conor Dooley
2024-05-01 17:06 ` Charlie Jenkins
2024-05-01 11:40 ` Conor Dooley
2024-05-01 17:10 ` Charlie Jenkins
2024-05-01 17:12 ` Conor Dooley
2024-05-01 16:44 ` Evan Green
2024-05-01 17:19 ` Conor Dooley
2024-05-01 17:58 ` Charlie Jenkins
2024-05-01 17:51 ` Charlie Jenkins
2024-05-01 18:03 ` Conor Dooley
2024-05-01 18:09 ` Conor Dooley [this message]
2024-05-01 18:37 ` Charlie Jenkins
2024-05-01 18:05 ` Evan Green
2024-05-02 22:31 ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 06/16] riscv: Introduce vendor variants of extension helpers Charlie Jenkins
2024-05-01 11:29 ` Conor Dooley
2024-05-01 19:45 ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 07/16] riscv: cpufeature: Extract common elements from extension checking Charlie Jenkins
2024-05-01 11:37 ` Conor Dooley
2024-05-01 19:48 ` Charlie Jenkins
2024-05-01 20:15 ` Conor Dooley
2024-05-01 20:39 ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 08/16] riscv: Convert xandespmu to use the vendor extension framework Charlie Jenkins
2024-05-01 11:38 ` Conor Dooley
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