From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: X512 <danger_mail@list.ru>, qemu-devel@nongnu.org
Cc: qemu-riscv <qemu-riscv@nongnu.org>, Sunil V L <sunilvl@ventanamicro.com>
Subject: Re: [PATCH] target/riscv: fix ACPI MCFG table
Date: Mon, 19 Feb 2024 17:43:56 +0100 [thread overview]
Message-ID: <6960207f-eaaa-4cfd-a4e3-3118da697ef7@linaro.org> (raw)
In-Reply-To: <180d236d-c8e4-411a-b4d2-632eb82092fa@list.ru>
On 19/2/24 17:09, X512 via wrote:
> MCFG segments should point to PCI configuration range, not BAR MMIO.
>
Fixes: 55ecd83b36 ("hw/riscv/virt-acpi-build.c: Add IO controllers and
devices")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Signed-off-by: Ilya Chugin <danger_mail@list.ru>
> ---
> hw/riscv/virt-acpi-build.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index fb8baf64f6..fe01b626ea 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s,
> AcpiBuildTables *tables)
> acpi_add_table(table_offsets, tables_blob);
> {
> AcpiMcfgInfo mcfg = {
> - .base = s->memmap[VIRT_PCIE_MMIO].base,
> - .size = s->memmap[VIRT_PCIE_MMIO].size,
> + .base = s->memmap[VIRT_PCIE_ECAM].base,
> + .size = s->memmap[VIRT_PCIE_ECAM].size,
> };
> build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
> s->oem_table_id);
next parent reply other threads:[~2024-02-19 16:44 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <180d236d-c8e4-411a-b4d2-632eb82092fa@list.ru>
2024-02-19 16:43 ` Philippe Mathieu-Daudé [this message]
2024-02-20 5:28 ` [PATCH] target/riscv: fix ACPI MCFG table Sunil V L
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