From: Jacob Pan <jacob.jun.pan@linux.intel.com> To: Jason Gunthorpe <jgg@nvidia.com> Cc: Christoph Hellwig <hch@infradead.org>, LKML <linux-kernel@vger.kernel.org>, iommu@lists.linux-foundation.org, Joerg Roedel <joro@8bytes.org>, Lu Baolu <baolu.lu@linux.intel.com>, Jean-Philippe Brucker <jean-philippe@linaro.com>, Yi Liu <yi.l.liu@intel.com>, Raj Ashok <ashok.raj@intel.com>, "Tian, Kevin" <kevin.tian@intel.com>, Dave Jiang <dave.jiang@intel.com>, wangzhou1@hisilicon.com, zhangfei.gao@linaro.org, vkoul@kernel.org, David Woodhouse <dwmw2@infradead.org>, "Luck, Tony" <tony.luck@intel.com>, jacob.jun.pan@linux.intel.com Subject: Re: [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit flags Date: Thu, 13 May 2021 08:10:50 -0700 [thread overview] Message-ID: <20210513081050.5cf6a6ed@jacob-builder> (raw) In-Reply-To: <20210513133834.GC1002214@nvidia.com> Hi Jason, On Thu, 13 May 2021 10:38:34 -0300, Jason Gunthorpe <jgg@nvidia.com> wrote: > On Thu, May 13, 2021 at 06:00:12AM -0700, Jacob Pan wrote: > > > > If you want to do SVA PASID then it also must come with DMA APIs to > > > > manage the CPU cache coherence that are all NOP's on x86. > > > > > > Yes. And we have plenty of precende where an IOMMU is in "bypass" > > > mode to allow access to all memory and then uses the simple > > > dma-direct case. > > I agree it is better not to expose the entire direct map. But the > > missing piece of using DMA APIs is the PASID. The caller needs the > > PASID value to do work submission once buffer is mapped. > > You still haven't explained why the kernel driver should have a PASID at > all. > For shared workqueue, it can only generate DMA request with PASID. The submission is done by ENQCMDS (S for supervisor) instruction. If we were not to share page tables with init_mm, we need a system PASID that doing the same direct mapping in IOMMU page tables. > Jason Thanks, Jacob
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From: Jacob Pan <jacob.jun.pan@linux.intel.com> To: Jason Gunthorpe <jgg@nvidia.com> Cc: vkoul@kernel.org, "Tian, Kevin" <kevin.tian@intel.com>, Dave Jiang <dave.jiang@intel.com>, Raj Ashok <ashok.raj@intel.com>, David Woodhouse <dwmw2@infradead.org>, LKML <linux-kernel@vger.kernel.org>, Christoph Hellwig <hch@infradead.org>, iommu@lists.linux-foundation.org, "Luck, Tony" <tony.luck@intel.com>, zhangfei.gao@linaro.org, Jean-Philippe Brucker <jean-philippe@linaro.com> Subject: Re: [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit flags Date: Thu, 13 May 2021 08:10:50 -0700 [thread overview] Message-ID: <20210513081050.5cf6a6ed@jacob-builder> (raw) In-Reply-To: <20210513133834.GC1002214@nvidia.com> Hi Jason, On Thu, 13 May 2021 10:38:34 -0300, Jason Gunthorpe <jgg@nvidia.com> wrote: > On Thu, May 13, 2021 at 06:00:12AM -0700, Jacob Pan wrote: > > > > If you want to do SVA PASID then it also must come with DMA APIs to > > > > manage the CPU cache coherence that are all NOP's on x86. > > > > > > Yes. And we have plenty of precende where an IOMMU is in "bypass" > > > mode to allow access to all memory and then uses the simple > > > dma-direct case. > > I agree it is better not to expose the entire direct map. But the > > missing piece of using DMA APIs is the PASID. The caller needs the > > PASID value to do work submission once buffer is mapped. > > You still haven't explained why the kernel driver should have a PASID at > all. > For shared workqueue, it can only generate DMA request with PASID. The submission is done by ENQCMDS (S for supervisor) instruction. If we were not to share page tables with init_mm, we need a system PASID that doing the same direct mapping in IOMMU page tables. > Jason Thanks, Jacob _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2021-05-13 15:08 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-10 13:25 [PATCH v4 0/2] Simplify and restrict IOMMU SVA APIs Jacob Pan 2021-05-10 13:25 ` Jacob Pan 2021-05-10 13:25 ` [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit flags Jacob Pan 2021-05-10 13:25 ` Jacob Pan 2021-05-10 23:37 ` Jason Gunthorpe 2021-05-10 23:37 ` Jason Gunthorpe 2021-05-11 3:31 ` Jacob Pan 2021-05-11 3:31 ` Jacob Pan 2021-05-11 11:48 ` Jason Gunthorpe 2021-05-11 11:48 ` Jason Gunthorpe 2021-05-11 16:14 ` Jacob Pan 2021-05-11 16:14 ` Jacob Pan 2021-05-11 16:35 ` Jason Gunthorpe 2021-05-11 16:35 ` Jason Gunthorpe 2021-05-11 18:05 ` Jacob Pan 2021-05-11 18:05 ` Jacob Pan 2021-05-11 19:47 ` Jason Gunthorpe 2021-05-11 19:47 ` Jason Gunthorpe 2021-05-12 6:37 ` Christoph Hellwig 2021-05-12 6:37 ` Christoph Hellwig 2021-05-13 13:00 ` Jacob Pan 2021-05-13 13:00 ` Jacob Pan 2021-05-13 13:38 ` Jason Gunthorpe 2021-05-13 13:38 ` Jason Gunthorpe 2021-05-13 15:10 ` Jacob Pan [this message] 2021-05-13 15:10 ` Jacob Pan 2021-05-13 16:44 ` Luck, Tony 2021-05-13 16:44 ` Luck, Tony 2021-05-13 17:33 ` Jason Gunthorpe 2021-05-13 17:33 ` Jason Gunthorpe 2021-05-13 18:53 ` Luck, Tony 2021-05-13 18:53 ` Luck, Tony 2021-05-13 19:00 ` Jason Gunthorpe 2021-05-13 19:00 ` Jason Gunthorpe 2021-05-13 19:14 ` Luck, Tony 2021-05-13 19:14 ` Luck, Tony 2021-05-13 19:20 ` Jason Gunthorpe 2021-05-13 19:20 ` Jason Gunthorpe 2021-05-13 19:46 ` Jacob Pan 2021-05-13 19:46 ` Jacob Pan 2021-05-13 19:57 ` Luck, Tony 2021-05-13 19:57 ` Luck, Tony 2021-05-13 20:22 ` Jacob Pan 2021-05-13 20:22 ` Jacob Pan 2021-05-13 22:31 ` Jason Gunthorpe 2021-05-13 22:31 ` Jason Gunthorpe 2021-05-13 23:40 ` Jacob Pan 2021-05-13 23:40 ` Jacob Pan 2021-05-17 14:37 ` Jason Gunthorpe 2021-05-17 14:37 ` Jason Gunthorpe 2021-05-19 15:46 ` Jacob Pan 2021-05-19 15:46 ` Jacob Pan 2021-05-12 10:18 ` Jean-Philippe Brucker 2021-05-12 10:18 ` Jean-Philippe Brucker 2021-05-10 13:25 ` [PATCH v4 2/2] iommu/sva: Remove mm parameter from SVA bind API Jacob Pan 2021-05-10 13:25 ` Jacob Pan 2021-05-12 10:24 ` Jean-Philippe Brucker 2021-05-12 10:24 ` Jean-Philippe Brucker
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