From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Frank Li <Frank.Li@nxp.com>
Cc: "Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-pci@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3 07/11] PCI: imx: Simplify switch-case logic by involve core_reset callback
Date: Sat, 27 Apr 2024 15:49:50 +0530 [thread overview]
Message-ID: <20240427101950.GL1981@thinkpad> (raw)
In-Reply-To: <20240402-pci2_upstream-v3-7-803414bdb430@nxp.com>
On Tue, Apr 02, 2024 at 10:33:43AM -0400, Frank Li wrote:
> Instead of using the switch case statement to assert/dassert the core reset
> handled by this driver itself, let's introduce a new callback core_reset()
> and define it for platforms that require it. This simplifies the code.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> drivers/pci/controller/dwc/pcie-imx.c | 131 ++++++++++++++++++----------------
> 1 file changed, 68 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-imx.c b/drivers/pci/controller/dwc/pcie-imx.c
> index 77dae5c3f7057..af0f960f28757 100644
> --- a/drivers/pci/controller/dwc/pcie-imx.c
> +++ b/drivers/pci/controller/dwc/pcie-imx.c
> @@ -104,6 +104,7 @@ struct imx_pcie_drvdata {
> const struct pci_epc_features *epc_features;
> int (*init_phy)(struct imx_pcie *pcie);
> int (*set_ref_clk)(struct imx_pcie *pcie, bool enable);
> + int (*core_reset)(struct imx_pcie *pcie, bool assert);
> };
>
> struct imx_pcie {
> @@ -671,35 +672,72 @@ static void imx_pcie_clk_disable(struct imx_pcie *imx_pcie)
> clk_bulk_disable_unprepare(imx_pcie->drvdata->clks_cnt, imx_pcie->clks);
> }
>
> +static int imx6sx_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
> +{
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
> + assert ? IMX6SX_GPR12_PCIE_TEST_POWERDOWN : 0);
Earlier, this register was not cleared during deassert. Is if fine?
> + /* Force PCIe PHY reset */
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5, IMX6SX_GPR5_PCIE_BTNRST_RESET,
> + assert ? IMX6SX_GPR5_PCIE_BTNRST_RESET : 0);
> + return 0;
> +}
> +
> +static int imx6qp_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
> +{
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST,
> + assert ? IMX6Q_GPR1_PCIE_SW_RST : 0);
> + if (!assert)
> + usleep_range(200, 500);
> +
> + return 0;
> +}
> +
> +static int imx6q_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
> +{
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD,
> + assert ? IMX6Q_GPR1_PCIE_TEST_PD : 0);
> +
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN,
> + assert ? 0 : IMX6Q_GPR1_PCIE_REF_CLK_EN);
> +
Same comment as above.
> + return 0;
> +}
> +
> +static int imx7d_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
> +{
> + struct dw_pcie *pci = imx_pcie->pci;
> + struct device *dev = pci->dev;
> +
> + if (assert)
> + return 0;
> +
> + /*
> + * Workaround for ERR010728, failure of PCI-e PLL VCO to oscillate, especially when cold.
What does 'especially when cold' means? I know it is an old comment, but still
it is not very clear.
> + * This turns off "Duty-cycle Corrector" and other mysterious undocumented things.
Same comment as previous patch.
> + */
> +
> + if (likely(imx_pcie->phy_base)) {
> + /* De-assert DCC_FB_EN */
> + writel(PCIE_PHY_CMN_REG4_DCC_FB_EN, imx_pcie->phy_base + PCIE_PHY_CMN_REG4);
> + /* Assert RX_EQS and RX_EQS_SEL */
> + writel(PCIE_PHY_CMN_REG24_RX_EQ_SEL | PCIE_PHY_CMN_REG24_RX_EQ,
> + imx_pcie->phy_base + PCIE_PHY_CMN_REG24);
> + /* Assert ATT_MODE */
> + writel(PCIE_PHY_CMN_REG26_ATT_MODE, imx_pcie->phy_base + PCIE_PHY_CMN_REG26);
Why does this workaround a part of core_reset handling? This function doesn't
look like performing reset at all.
- Mani
> + } else {
> + dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n");
> + }
> + imx7d_pcie_wait_for_phy_pll_lock(imx_pcie);
> + return 0;
> +}
> +
> static void imx_pcie_assert_core_reset(struct imx_pcie *imx_pcie)
> {
> reset_control_assert(imx_pcie->pciephy_reset);
> reset_control_assert(imx_pcie->apps_reset);
>
> - switch (imx_pcie->drvdata->variant) {
> - case IMX6SX:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
> - IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
> - IMX6SX_GPR12_PCIE_TEST_POWERDOWN);
> - /* Force PCIe PHY reset */
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5,
> - IMX6SX_GPR5_PCIE_BTNRST_RESET,
> - IMX6SX_GPR5_PCIE_BTNRST_RESET);
> - break;
> - case IMX6QP:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_SW_RST,
> - IMX6Q_GPR1_PCIE_SW_RST);
> - break;
> - case IMX6Q:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18);
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
> - break;
> - default:
> - break;
> - }
> + if (imx_pcie->drvdata->core_reset)
> + imx_pcie->drvdata->core_reset(imx_pcie, true);
>
> /* Some boards don't have PCIe reset GPIO. */
> if (gpio_is_valid(imx_pcie->reset_gpio))
> @@ -709,47 +747,10 @@ static void imx_pcie_assert_core_reset(struct imx_pcie *imx_pcie)
>
> static int imx_pcie_deassert_core_reset(struct imx_pcie *imx_pcie)
> {
> - struct dw_pcie *pci = imx_pcie->pci;
> - struct device *dev = pci->dev;
> -
> reset_control_deassert(imx_pcie->pciephy_reset);
>
> - switch (imx_pcie->drvdata->variant) {
> - case IMX7D:
> - /* Workaround for ERR010728, failure of PCI-e PLL VCO to
> - * oscillate, especially when cold. This turns off "Duty-cycle
> - * Corrector" and other mysterious undocumented things.
> - */
> - if (likely(imx_pcie->phy_base)) {
> - /* De-assert DCC_FB_EN */
> - writel(PCIE_PHY_CMN_REG4_DCC_FB_EN,
> - imx_pcie->phy_base + PCIE_PHY_CMN_REG4);
> - /* Assert RX_EQS and RX_EQS_SEL */
> - writel(PCIE_PHY_CMN_REG24_RX_EQ_SEL
> - | PCIE_PHY_CMN_REG24_RX_EQ,
> - imx_pcie->phy_base + PCIE_PHY_CMN_REG24);
> - /* Assert ATT_MODE */
> - writel(PCIE_PHY_CMN_REG26_ATT_MODE,
> - imx_pcie->phy_base + PCIE_PHY_CMN_REG26);
> - } else {
> - dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n");
> - }
> -
> - imx7d_pcie_wait_for_phy_pll_lock(imx_pcie);
> - break;
> - case IMX6SX:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5,
> - IMX6SX_GPR5_PCIE_BTNRST_RESET, 0);
> - break;
> - case IMX6QP:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_SW_RST, 0);
> -
> - usleep_range(200, 500);
> - break;
> - default:
> - break;
> - }
> + if (imx_pcie->drvdata->core_reset)
> + imx_pcie->drvdata->core_reset(imx_pcie, false);
>
> /* Some boards don't have PCIe reset GPIO. */
> if (gpio_is_valid(imx_pcie->reset_gpio)) {
> @@ -1447,6 +1448,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .init_phy = imx_pcie_init_phy,
> .set_ref_clk = imx6q_pcie_set_ref_clk,
> + .core_reset = imx6q_pcie_core_reset,
> },
> [IMX6SX] = {
> .variant = IMX6SX,
> @@ -1462,6 +1464,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .init_phy = imx6sx_pcie_init_phy,
> .set_ref_clk = imx6sx_pcie_set_ref_clk,
> + .core_reset = imx6sx_pcie_core_reset,
> },
> [IMX6QP] = {
> .variant = IMX6QP,
> @@ -1478,6 +1481,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .init_phy = imx_pcie_init_phy,
> .set_ref_clk = imx6q_pcie_set_ref_clk,
> + .core_reset = imx6qp_pcie_core_reset,
> },
> [IMX7D] = {
> .variant = IMX7D,
> @@ -1491,6 +1495,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .init_phy = imx7d_pcie_init_phy,
> .set_ref_clk = imx7d_pcie_set_ref_clk,
> + .core_reset = imx7d_pcie_core_reset,
> },
> [IMX8MQ] = {
> .variant = IMX8MQ,
>
> --
> 2.34.1
>
--
மணிவண்ணன் சதாசிவம்
WARNING: multiple messages have this Message-ID (diff)
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Frank Li <Frank.Li@nxp.com>
Cc: "Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-pci@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3 07/11] PCI: imx: Simplify switch-case logic by involve core_reset callback
Date: Sat, 27 Apr 2024 15:49:50 +0530 [thread overview]
Message-ID: <20240427101950.GL1981@thinkpad> (raw)
In-Reply-To: <20240402-pci2_upstream-v3-7-803414bdb430@nxp.com>
On Tue, Apr 02, 2024 at 10:33:43AM -0400, Frank Li wrote:
> Instead of using the switch case statement to assert/dassert the core reset
> handled by this driver itself, let's introduce a new callback core_reset()
> and define it for platforms that require it. This simplifies the code.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> drivers/pci/controller/dwc/pcie-imx.c | 131 ++++++++++++++++++----------------
> 1 file changed, 68 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-imx.c b/drivers/pci/controller/dwc/pcie-imx.c
> index 77dae5c3f7057..af0f960f28757 100644
> --- a/drivers/pci/controller/dwc/pcie-imx.c
> +++ b/drivers/pci/controller/dwc/pcie-imx.c
> @@ -104,6 +104,7 @@ struct imx_pcie_drvdata {
> const struct pci_epc_features *epc_features;
> int (*init_phy)(struct imx_pcie *pcie);
> int (*set_ref_clk)(struct imx_pcie *pcie, bool enable);
> + int (*core_reset)(struct imx_pcie *pcie, bool assert);
> };
>
> struct imx_pcie {
> @@ -671,35 +672,72 @@ static void imx_pcie_clk_disable(struct imx_pcie *imx_pcie)
> clk_bulk_disable_unprepare(imx_pcie->drvdata->clks_cnt, imx_pcie->clks);
> }
>
> +static int imx6sx_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
> +{
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
> + assert ? IMX6SX_GPR12_PCIE_TEST_POWERDOWN : 0);
Earlier, this register was not cleared during deassert. Is if fine?
> + /* Force PCIe PHY reset */
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5, IMX6SX_GPR5_PCIE_BTNRST_RESET,
> + assert ? IMX6SX_GPR5_PCIE_BTNRST_RESET : 0);
> + return 0;
> +}
> +
> +static int imx6qp_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
> +{
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST,
> + assert ? IMX6Q_GPR1_PCIE_SW_RST : 0);
> + if (!assert)
> + usleep_range(200, 500);
> +
> + return 0;
> +}
> +
> +static int imx6q_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
> +{
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD,
> + assert ? IMX6Q_GPR1_PCIE_TEST_PD : 0);
> +
> + regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN,
> + assert ? 0 : IMX6Q_GPR1_PCIE_REF_CLK_EN);
> +
Same comment as above.
> + return 0;
> +}
> +
> +static int imx7d_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert)
> +{
> + struct dw_pcie *pci = imx_pcie->pci;
> + struct device *dev = pci->dev;
> +
> + if (assert)
> + return 0;
> +
> + /*
> + * Workaround for ERR010728, failure of PCI-e PLL VCO to oscillate, especially when cold.
What does 'especially when cold' means? I know it is an old comment, but still
it is not very clear.
> + * This turns off "Duty-cycle Corrector" and other mysterious undocumented things.
Same comment as previous patch.
> + */
> +
> + if (likely(imx_pcie->phy_base)) {
> + /* De-assert DCC_FB_EN */
> + writel(PCIE_PHY_CMN_REG4_DCC_FB_EN, imx_pcie->phy_base + PCIE_PHY_CMN_REG4);
> + /* Assert RX_EQS and RX_EQS_SEL */
> + writel(PCIE_PHY_CMN_REG24_RX_EQ_SEL | PCIE_PHY_CMN_REG24_RX_EQ,
> + imx_pcie->phy_base + PCIE_PHY_CMN_REG24);
> + /* Assert ATT_MODE */
> + writel(PCIE_PHY_CMN_REG26_ATT_MODE, imx_pcie->phy_base + PCIE_PHY_CMN_REG26);
Why does this workaround a part of core_reset handling? This function doesn't
look like performing reset at all.
- Mani
> + } else {
> + dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n");
> + }
> + imx7d_pcie_wait_for_phy_pll_lock(imx_pcie);
> + return 0;
> +}
> +
> static void imx_pcie_assert_core_reset(struct imx_pcie *imx_pcie)
> {
> reset_control_assert(imx_pcie->pciephy_reset);
> reset_control_assert(imx_pcie->apps_reset);
>
> - switch (imx_pcie->drvdata->variant) {
> - case IMX6SX:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
> - IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
> - IMX6SX_GPR12_PCIE_TEST_POWERDOWN);
> - /* Force PCIe PHY reset */
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5,
> - IMX6SX_GPR5_PCIE_BTNRST_RESET,
> - IMX6SX_GPR5_PCIE_BTNRST_RESET);
> - break;
> - case IMX6QP:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_SW_RST,
> - IMX6Q_GPR1_PCIE_SW_RST);
> - break;
> - case IMX6Q:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18);
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16);
> - break;
> - default:
> - break;
> - }
> + if (imx_pcie->drvdata->core_reset)
> + imx_pcie->drvdata->core_reset(imx_pcie, true);
>
> /* Some boards don't have PCIe reset GPIO. */
> if (gpio_is_valid(imx_pcie->reset_gpio))
> @@ -709,47 +747,10 @@ static void imx_pcie_assert_core_reset(struct imx_pcie *imx_pcie)
>
> static int imx_pcie_deassert_core_reset(struct imx_pcie *imx_pcie)
> {
> - struct dw_pcie *pci = imx_pcie->pci;
> - struct device *dev = pci->dev;
> -
> reset_control_deassert(imx_pcie->pciephy_reset);
>
> - switch (imx_pcie->drvdata->variant) {
> - case IMX7D:
> - /* Workaround for ERR010728, failure of PCI-e PLL VCO to
> - * oscillate, especially when cold. This turns off "Duty-cycle
> - * Corrector" and other mysterious undocumented things.
> - */
> - if (likely(imx_pcie->phy_base)) {
> - /* De-assert DCC_FB_EN */
> - writel(PCIE_PHY_CMN_REG4_DCC_FB_EN,
> - imx_pcie->phy_base + PCIE_PHY_CMN_REG4);
> - /* Assert RX_EQS and RX_EQS_SEL */
> - writel(PCIE_PHY_CMN_REG24_RX_EQ_SEL
> - | PCIE_PHY_CMN_REG24_RX_EQ,
> - imx_pcie->phy_base + PCIE_PHY_CMN_REG24);
> - /* Assert ATT_MODE */
> - writel(PCIE_PHY_CMN_REG26_ATT_MODE,
> - imx_pcie->phy_base + PCIE_PHY_CMN_REG26);
> - } else {
> - dev_warn(dev, "Unable to apply ERR010728 workaround. DT missing fsl,imx7d-pcie-phy phandle ?\n");
> - }
> -
> - imx7d_pcie_wait_for_phy_pll_lock(imx_pcie);
> - break;
> - case IMX6SX:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR5,
> - IMX6SX_GPR5_PCIE_BTNRST_RESET, 0);
> - break;
> - case IMX6QP:
> - regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR1,
> - IMX6Q_GPR1_PCIE_SW_RST, 0);
> -
> - usleep_range(200, 500);
> - break;
> - default:
> - break;
> - }
> + if (imx_pcie->drvdata->core_reset)
> + imx_pcie->drvdata->core_reset(imx_pcie, false);
>
> /* Some boards don't have PCIe reset GPIO. */
> if (gpio_is_valid(imx_pcie->reset_gpio)) {
> @@ -1447,6 +1448,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .init_phy = imx_pcie_init_phy,
> .set_ref_clk = imx6q_pcie_set_ref_clk,
> + .core_reset = imx6q_pcie_core_reset,
> },
> [IMX6SX] = {
> .variant = IMX6SX,
> @@ -1462,6 +1464,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .init_phy = imx6sx_pcie_init_phy,
> .set_ref_clk = imx6sx_pcie_set_ref_clk,
> + .core_reset = imx6sx_pcie_core_reset,
> },
> [IMX6QP] = {
> .variant = IMX6QP,
> @@ -1478,6 +1481,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .init_phy = imx_pcie_init_phy,
> .set_ref_clk = imx6q_pcie_set_ref_clk,
> + .core_reset = imx6qp_pcie_core_reset,
> },
> [IMX7D] = {
> .variant = IMX7D,
> @@ -1491,6 +1495,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> .mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> .init_phy = imx7d_pcie_init_phy,
> .set_ref_clk = imx7d_pcie_set_ref_clk,
> + .core_reset = imx7d_pcie_core_reset,
> },
> [IMX8MQ] = {
> .variant = IMX8MQ,
>
> --
> 2.34.1
>
--
மணிவண்ணன் சதாசிவம்
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next prev parent reply other threads:[~2024-04-27 10:20 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-02 14:33 [PATCH v3 00/11] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-02 14:33 ` [PATCH v3 01/11] PCI: imx6: Fix PCIe link down when i.MX8MM and i.MX8MP PCIe is EP mode Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 9:00 ` Manivannan Sadhasivam
2024-04-27 9:00 ` Manivannan Sadhasivam
2024-04-29 14:53 ` Frank Li
2024-04-29 14:53 ` Frank Li
2024-04-02 14:33 ` [PATCH v3 02/11] PCI: imx6: Fix i.MX8MP PCIe EP can not trigger MSI Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 9:23 ` Manivannan Sadhasivam
2024-04-27 9:23 ` Manivannan Sadhasivam
2024-04-29 15:58 ` Frank Li
2024-04-29 15:58 ` Frank Li
2024-04-02 14:33 ` [PATCH v3 03/11] PCI: imx6: Rename imx6_* with imx_* Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 9:29 ` Manivannan Sadhasivam
2024-04-27 9:29 ` Manivannan Sadhasivam
2024-04-02 14:33 ` [PATCH v3 04/11] PCI: imx6: Rename pci-imx6.c to pcie-imx.c Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 9:31 ` Manivannan Sadhasivam
2024-04-27 9:31 ` Manivannan Sadhasivam
2024-04-29 16:01 ` Frank Li
2024-04-29 16:01 ` Frank Li
2024-04-02 14:33 ` [PATCH v3 05/11] MAINTAINERS: pci: imx: update imx6* to imx* since rename driver file Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 9:33 ` Manivannan Sadhasivam
2024-04-27 9:33 ` Manivannan Sadhasivam
2024-04-29 15:03 ` Rob Herring
2024-04-29 15:03 ` Rob Herring
2024-04-02 14:33 ` [PATCH v3 06/11] PCI: imx: Simplify switch-case logic by involve set_ref_clk callback Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 9:54 ` Manivannan Sadhasivam
2024-04-27 9:54 ` Manivannan Sadhasivam
2024-04-02 14:33 ` [PATCH v3 07/11] PCI: imx: Simplify switch-case logic by involve core_reset callback Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 10:19 ` Manivannan Sadhasivam [this message]
2024-04-27 10:19 ` Manivannan Sadhasivam
2024-04-29 16:38 ` Frank Li
2024-04-29 16:38 ` Frank Li
2024-04-02 14:33 ` [PATCH v3 08/11] PCI: imx: Config look up table(LUT) to support MSI ITS and IOMMU for i.MX95 Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 11:36 ` Manivannan Sadhasivam
2024-04-27 11:36 ` Manivannan Sadhasivam
2024-04-29 15:06 ` Rob Herring
2024-04-29 15:06 ` Rob Herring
2024-04-29 17:00 ` Frank Li
2024-04-29 17:00 ` Frank Li
2024-04-29 15:08 ` Rob Herring
2024-04-29 15:08 ` Rob Herring
2024-04-02 14:33 ` [PATCH v3 09/11] PCI: imx: Consolidate redundant if-checks Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 11:38 ` Manivannan Sadhasivam
2024-04-27 11:38 ` Manivannan Sadhasivam
2024-04-02 14:33 ` [PATCH v3 10/11] dt-bindings: imx6q-pcie: Add i.MX8Q pcie compatible string Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-29 15:48 ` Rob Herring
2024-04-29 15:48 ` Rob Herring
2024-04-29 21:23 ` Frank Li
2024-04-29 21:23 ` Frank Li
2024-05-07 14:55 ` Rob Herring
2024-05-07 14:55 ` Rob Herring
2024-04-02 14:33 ` [PATCH v3 11/11] PCI: imx6: Add i.MX8Q PCIe support Frank Li
2024-04-02 14:33 ` Frank Li
2024-04-27 11:47 ` Manivannan Sadhasivam
2024-04-27 11:47 ` Manivannan Sadhasivam
2024-04-29 17:56 ` Frank Li
2024-04-29 17:56 ` Frank Li
2024-04-16 14:07 ` [PATCH v3 00/11] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Frank Li
2024-04-16 14:07 ` Frank Li
2024-04-25 11:12 ` Manivannan Sadhasivam
2024-04-25 11:12 ` Manivannan Sadhasivam
2024-04-23 14:23 ` Frank Li
2024-04-23 14:23 ` Frank Li
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