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From: Sudeep Holla <sudeep.holla@arm.com>
To: Krzysztof Kozlowski <k.kozlowski@samsung.com>,
	Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Sudeep Holla <sudeep.holla@arm.com>,
	"linux-samsung-soc@vger.kernel.org" 
	<linux-samsung-soc@vger.kernel.org>,
	Jason Cooper <jason@lakedaemon.net>,
	Chanho Park <parkch98@gmail.com>,
	Doug Anderson <dianders@chromium.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Kukjin Kim <kgene@kernel.org>,
	Peter Chubb <peter.chubb@nicta.com.au>,
	Shuah Khan <shuahkhan@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend
Date: Fri, 12 Jun 2015 11:56:46 +0100	[thread overview]
Message-ID: <557ABAEE.9010703@arm.com> (raw)
In-Reply-To: <557AB793.1060809@samsung.com>



On 12/06/15 11:42, Krzysztof Kozlowski wrote:
> On 12.06.2015 19:10, Sudeep Holla wrote:
>>
>>
>> On 12/06/15 06:43, Javier Martinez Canillas wrote:
>>> The Exynos interrupt combiner IP loses its state when the SoC enters
>>> into a low power state during a Suspend-to-RAM. This means that if a
>>> IRQ is used as a source, the interrupts for the devices are disabled
>>> when the system is resumed from a sleep state so are not triggered.
>>>
>>> Save the interrupt enable set register for each combiner group and
>>> restore it after resume to make sure that the interrupts are enabled.
>>>
>>
>> Not sure if you need this. IMO it's not clean and redundant though I
>> admit many drivers do exactly same thing. I am trying to remove or point
>> out those redundant code as irqchip core has options/flags to do what
>> you need. I assume there are no wakeup sources connected to this
>> combiner.
>
> It may have wake up sources connected. Correct me if I am wrong but (at
> least) on Exynos5250 combiner takes care of gpx1 GPIO pins which may be
> external interrupts (e.g. power key on Exynos5250 Snow). I didn't check
> other boards.
>

In that case, this irqchip should implement irq_set_wake and the driver
implementing power key should use enable_irq_wake in the suspend path.
Just saving all the mask/enable registers is not scalable solution and
also useless if it's just one or to interrupts that are very few IRQs
registered/actively being used.

Regards,
Sudeep

WARNING: multiple messages have this Message-ID (diff)
From: sudeep.holla@arm.com (Sudeep Holla)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend
Date: Fri, 12 Jun 2015 11:56:46 +0100	[thread overview]
Message-ID: <557ABAEE.9010703@arm.com> (raw)
In-Reply-To: <557AB793.1060809@samsung.com>



On 12/06/15 11:42, Krzysztof Kozlowski wrote:
> On 12.06.2015 19:10, Sudeep Holla wrote:
>>
>>
>> On 12/06/15 06:43, Javier Martinez Canillas wrote:
>>> The Exynos interrupt combiner IP loses its state when the SoC enters
>>> into a low power state during a Suspend-to-RAM. This means that if a
>>> IRQ is used as a source, the interrupts for the devices are disabled
>>> when the system is resumed from a sleep state so are not triggered.
>>>
>>> Save the interrupt enable set register for each combiner group and
>>> restore it after resume to make sure that the interrupts are enabled.
>>>
>>
>> Not sure if you need this. IMO it's not clean and redundant though I
>> admit many drivers do exactly same thing. I am trying to remove or point
>> out those redundant code as irqchip core has options/flags to do what
>> you need. I assume there are no wakeup sources connected to this
>> combiner.
>
> It may have wake up sources connected. Correct me if I am wrong but (at
> least) on Exynos5250 combiner takes care of gpx1 GPIO pins which may be
> external interrupts (e.g. power key on Exynos5250 Snow). I didn't check
> other boards.
>

In that case, this irqchip should implement irq_set_wake and the driver
implementing power key should use enable_irq_wake in the suspend path.
Just saving all the mask/enable registers is not scalable solution and
also useless if it's just one or to interrupts that are very few IRQs
registered/actively being used.

Regards,
Sudeep

  reply	other threads:[~2015-06-12 10:56 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-12  5:43 [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend Javier Martinez Canillas
2015-06-12  5:43 ` Javier Martinez Canillas
2015-06-12  5:57 ` Krzysztof Kozlowski
2015-06-12  5:57   ` Krzysztof Kozlowski
2015-06-12 10:10 ` Sudeep Holla
2015-06-12 10:10   ` Sudeep Holla
2015-06-12 10:42   ` Krzysztof Kozlowski
2015-06-12 10:42     ` Krzysztof Kozlowski
2015-06-12 10:56     ` Sudeep Holla [this message]
2015-06-12 10:56       ` Sudeep Holla
2015-06-12 11:27   ` Javier Martinez Canillas
2015-06-12 11:27     ` Javier Martinez Canillas
2015-06-12 11:54     ` Sudeep Holla
2015-06-12 11:54       ` Sudeep Holla
2015-06-12 12:57       ` Javier Martinez Canillas
2015-06-12 12:57         ` Javier Martinez Canillas
2015-06-12 19:36         ` Javier Martinez Canillas
2015-06-12 19:36           ` Javier Martinez Canillas
2015-06-12 20:17           ` Doug Anderson
2015-06-12 20:17             ` Doug Anderson
2015-06-15  7:46             ` Javier Martinez Canillas
2015-06-15  7:46               ` Javier Martinez Canillas
2015-06-15  9:01               ` Sudeep Holla
2015-06-15  9:01                 ` Sudeep Holla
2015-06-15 15:00                 ` Javier Martinez Canillas
2015-06-15 15:00                   ` Javier Martinez Canillas
2015-06-15 15:08                   ` Sudeep Holla
2015-06-15 15:08                     ` Sudeep Holla
2015-06-15 15:23                     ` Javier Martinez Canillas
2015-06-15 15:23                       ` Javier Martinez Canillas
2015-06-15 23:57                       ` Krzysztof Kozlowski
2015-06-15 23:57                         ` Krzysztof Kozlowski
2015-06-16  3:19                         ` Javier Martinez Canillas
2015-06-16  3:19                           ` Javier Martinez Canillas
2015-06-16  8:21                         ` Thomas Gleixner
2015-06-16  8:21                           ` Thomas Gleixner
2015-06-16 12:32                   ` Tomasz Figa
2015-06-16 12:32                     ` Tomasz Figa
2015-06-16 13:11                     ` Sudeep Holla
2015-06-16 13:11                       ` Sudeep Holla
2015-06-15  8:52             ` Sudeep Holla
2015-06-15  8:52               ` Sudeep Holla
2015-06-16  9:36 ` [tip:irq/core] " tip-bot for Javier Martinez Canillas

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