From: Sudeep Holla <sudeep.holla@arm.com>
To: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Sudeep Holla <sudeep.holla@arm.com>,
Krzysztof Kozlowski <k.kozlowski@samsung.com>,
"linux-samsung-soc@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
Jason Cooper <jason@lakedaemon.net>,
Chanho Park <parkch98@gmail.com>,
Doug Anderson <dianders@chromium.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Kukjin Kim <kgene@kernel.org>,
Peter Chubb <peter.chubb@nicta.com.au>,
Shuah Khan <shuahkhan@gmail.com>,
Tomasz Figa <tomasz.figa@gmail.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend
Date: Fri, 12 Jun 2015 11:10:20 +0100 [thread overview]
Message-ID: <557AB00C.5040606@arm.com> (raw)
In-Reply-To: <1434087795-13990-1-git-send-email-javier.martinez@collabora.co.uk>
On 12/06/15 06:43, Javier Martinez Canillas wrote:
> The Exynos interrupt combiner IP loses its state when the SoC enters
> into a low power state during a Suspend-to-RAM. This means that if a
> IRQ is used as a source, the interrupts for the devices are disabled
> when the system is resumed from a sleep state so are not triggered.
>
> Save the interrupt enable set register for each combiner group and
> restore it after resume to make sure that the interrupts are enabled.
>
Not sure if you need this. IMO it's not clean and redundant though I
admit many drivers do exactly same thing. I am trying to remove or point
out those redundant code as irqchip core has options/flags to do what
you need. I assume there are no wakeup sources connected to this
combiner. Setting irqchip flags should solve this problem. A simple
patch below should do the job ?
-->8
diff --git a/drivers/irqchip/exynos-combiner.c
b/drivers/irqchip/exynos-combiner.c
index 5945223b73fa..c0bcec59f829 100644
--- a/drivers/irqchip/exynos-combiner.c
+++ b/drivers/irqchip/exynos-combiner.c
@@ -111,6 +111,7 @@ static struct irq_chip combiner_chip = {
#ifdef CONFIG_SMP
.irq_set_affinity = combiner_set_affinity,
#endif
+ .flags = IRQCHIP_MASK_ON_SUSPEND,
};
WARNING: multiple messages have this Message-ID (diff)
From: sudeep.holla@arm.com (Sudeep Holla)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend
Date: Fri, 12 Jun 2015 11:10:20 +0100 [thread overview]
Message-ID: <557AB00C.5040606@arm.com> (raw)
In-Reply-To: <1434087795-13990-1-git-send-email-javier.martinez@collabora.co.uk>
On 12/06/15 06:43, Javier Martinez Canillas wrote:
> The Exynos interrupt combiner IP loses its state when the SoC enters
> into a low power state during a Suspend-to-RAM. This means that if a
> IRQ is used as a source, the interrupts for the devices are disabled
> when the system is resumed from a sleep state so are not triggered.
>
> Save the interrupt enable set register for each combiner group and
> restore it after resume to make sure that the interrupts are enabled.
>
Not sure if you need this. IMO it's not clean and redundant though I
admit many drivers do exactly same thing. I am trying to remove or point
out those redundant code as irqchip core has options/flags to do what
you need. I assume there are no wakeup sources connected to this
combiner. Setting irqchip flags should solve this problem. A simple
patch below should do the job ?
-->8
diff --git a/drivers/irqchip/exynos-combiner.c
b/drivers/irqchip/exynos-combiner.c
index 5945223b73fa..c0bcec59f829 100644
--- a/drivers/irqchip/exynos-combiner.c
+++ b/drivers/irqchip/exynos-combiner.c
@@ -111,6 +111,7 @@ static struct irq_chip combiner_chip = {
#ifdef CONFIG_SMP
.irq_set_affinity = combiner_set_affinity,
#endif
+ .flags = IRQCHIP_MASK_ON_SUSPEND,
};
next prev parent reply other threads:[~2015-06-12 10:10 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-12 5:43 [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend Javier Martinez Canillas
2015-06-12 5:43 ` Javier Martinez Canillas
2015-06-12 5:57 ` Krzysztof Kozlowski
2015-06-12 5:57 ` Krzysztof Kozlowski
2015-06-12 10:10 ` Sudeep Holla [this message]
2015-06-12 10:10 ` Sudeep Holla
2015-06-12 10:42 ` Krzysztof Kozlowski
2015-06-12 10:42 ` Krzysztof Kozlowski
2015-06-12 10:56 ` Sudeep Holla
2015-06-12 10:56 ` Sudeep Holla
2015-06-12 11:27 ` Javier Martinez Canillas
2015-06-12 11:27 ` Javier Martinez Canillas
2015-06-12 11:54 ` Sudeep Holla
2015-06-12 11:54 ` Sudeep Holla
2015-06-12 12:57 ` Javier Martinez Canillas
2015-06-12 12:57 ` Javier Martinez Canillas
2015-06-12 19:36 ` Javier Martinez Canillas
2015-06-12 19:36 ` Javier Martinez Canillas
2015-06-12 20:17 ` Doug Anderson
2015-06-12 20:17 ` Doug Anderson
2015-06-15 7:46 ` Javier Martinez Canillas
2015-06-15 7:46 ` Javier Martinez Canillas
2015-06-15 9:01 ` Sudeep Holla
2015-06-15 9:01 ` Sudeep Holla
2015-06-15 15:00 ` Javier Martinez Canillas
2015-06-15 15:00 ` Javier Martinez Canillas
2015-06-15 15:08 ` Sudeep Holla
2015-06-15 15:08 ` Sudeep Holla
2015-06-15 15:23 ` Javier Martinez Canillas
2015-06-15 15:23 ` Javier Martinez Canillas
2015-06-15 23:57 ` Krzysztof Kozlowski
2015-06-15 23:57 ` Krzysztof Kozlowski
2015-06-16 3:19 ` Javier Martinez Canillas
2015-06-16 3:19 ` Javier Martinez Canillas
2015-06-16 8:21 ` Thomas Gleixner
2015-06-16 8:21 ` Thomas Gleixner
2015-06-16 12:32 ` Tomasz Figa
2015-06-16 12:32 ` Tomasz Figa
2015-06-16 13:11 ` Sudeep Holla
2015-06-16 13:11 ` Sudeep Holla
2015-06-15 8:52 ` Sudeep Holla
2015-06-15 8:52 ` Sudeep Holla
2015-06-16 9:36 ` [tip:irq/core] " tip-bot for Javier Martinez Canillas
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