From: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
To: Sudeep Holla <sudeep.holla@arm.com>,
Doug Anderson <dianders@chromium.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>,
"linux-samsung-soc@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
Jason Cooper <jason@lakedaemon.net>,
Chanho Park <parkch98@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Kukjin Kim <kgene@kernel.org>,
Peter Chubb <peter.chubb@nicta.com.au>,
Shuah Khan <shuahkhan@gmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
Tomasz Figa <tomasz.figa@gmail.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend
Date: Mon, 15 Jun 2015 17:00:32 +0200 [thread overview]
Message-ID: <557EE890.2050001@collabora.co.uk> (raw)
In-Reply-To: <557E947B.3030804@arm.com>
Hello Sudeep,
On 06/15/2015 11:01 AM, Sudeep Holla wrote:
>
>
> On 15/06/15 08:46, Javier Martinez Canillas wrote:
> [...]
>
>>
>> Sudeep, so we may need something like $subject after all from Doug's
>> explanations since the combiner chip state is lost during a S2R. I know
>> that it adds more duplicated code (others irqchip drivers do the same)
>> and it may not scale well if a chip has many registers but is the best
>> solution I could came with.
>>
>
> OK
>
>> If you have a suggestion for a better alternative, I can give a try and
>> write the patch. But I think $subject could also land to fix this issue
>> since is a very non intrusive change and later can be changed once the
>> irqchip core supports this use case.
>>
>
> Agreed. But I would suggest also to add MASK_ON_SUSPEND and set_irq_wake
> also and then you can restore iff it's non-zero as irq core will take
> care of most of the non-wakeup sources. Because I am planning to push
I've looking at this and a problem I found is that IIUC the set_irq_wake
is not propagated from the the Exynos pinctrl / GPIO driver which is the
combiner's external interrupt source so the callback is never called.
Which means that right now only the state of the wakeup source IRQs can't
be saved since that information is not present.
The drivers/pinctrl/samsung/pinctrl-exynos.c driver enables and disables
the combiner interrupts but its .irq_set_wake handler only updates the
wakeup source mask for the external interrupts but does not call the
combiner .set_irq_wake so that should be changed as well.
But even for non-wakeup interrupts, I found that they are not enabled when
adding the MASK_ON_SUSPEND on my tests. I don't know if that is related
to the pinctrl driver missing something else though.
> MASK_ON_SUSPEND to GIC and it will break this combiner if it assumes the
> combiner interrupts are always on in GIC. Implement set_irq_wake as
> enable_irq_wake (comb_irq_to_GIC).
>
Right, but can we do this as a follow-up? S2R is currently broken on these
machines and $subject is I think a reasonable small fix that won't introduce
any regressions.
To do a more intrusive change, I should better understand the interactions
between the Exynos pinctrl / GPIO, interrupt combiner and the GIC and in the
meantime S2R will continue to be broken on these platforms unless someone
more familiar with all this could point me in the right direction.
> Regards,
> Sudeep
>
Best regards,
Javier
WARNING: multiple messages have this Message-ID (diff)
From: javier.martinez@collabora.co.uk (Javier Martinez Canillas)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend
Date: Mon, 15 Jun 2015 17:00:32 +0200 [thread overview]
Message-ID: <557EE890.2050001@collabora.co.uk> (raw)
In-Reply-To: <557E947B.3030804@arm.com>
Hello Sudeep,
On 06/15/2015 11:01 AM, Sudeep Holla wrote:
>
>
> On 15/06/15 08:46, Javier Martinez Canillas wrote:
> [...]
>
>>
>> Sudeep, so we may need something like $subject after all from Doug's
>> explanations since the combiner chip state is lost during a S2R. I know
>> that it adds more duplicated code (others irqchip drivers do the same)
>> and it may not scale well if a chip has many registers but is the best
>> solution I could came with.
>>
>
> OK
>
>> If you have a suggestion for a better alternative, I can give a try and
>> write the patch. But I think $subject could also land to fix this issue
>> since is a very non intrusive change and later can be changed once the
>> irqchip core supports this use case.
>>
>
> Agreed. But I would suggest also to add MASK_ON_SUSPEND and set_irq_wake
> also and then you can restore iff it's non-zero as irq core will take
> care of most of the non-wakeup sources. Because I am planning to push
I've looking at this and a problem I found is that IIUC the set_irq_wake
is not propagated from the the Exynos pinctrl / GPIO driver which is the
combiner's external interrupt source so the callback is never called.
Which means that right now only the state of the wakeup source IRQs can't
be saved since that information is not present.
The drivers/pinctrl/samsung/pinctrl-exynos.c driver enables and disables
the combiner interrupts but its .irq_set_wake handler only updates the
wakeup source mask for the external interrupts but does not call the
combiner .set_irq_wake so that should be changed as well.
But even for non-wakeup interrupts, I found that they are not enabled when
adding the MASK_ON_SUSPEND on my tests. I don't know if that is related
to the pinctrl driver missing something else though.
> MASK_ON_SUSPEND to GIC and it will break this combiner if it assumes the
> combiner interrupts are always on in GIC. Implement set_irq_wake as
> enable_irq_wake (comb_irq_to_GIC).
>
Right, but can we do this as a follow-up? S2R is currently broken on these
machines and $subject is I think a reasonable small fix that won't introduce
any regressions.
To do a more intrusive change, I should better understand the interactions
between the Exynos pinctrl / GPIO, interrupt combiner and the GIC and in the
meantime S2R will continue to be broken on these platforms unless someone
more familiar with all this could point me in the right direction.
> Regards,
> Sudeep
>
Best regards,
Javier
next prev parent reply other threads:[~2015-06-15 15:00 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-12 5:43 [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set on suspend Javier Martinez Canillas
2015-06-12 5:43 ` Javier Martinez Canillas
2015-06-12 5:57 ` Krzysztof Kozlowski
2015-06-12 5:57 ` Krzysztof Kozlowski
2015-06-12 10:10 ` Sudeep Holla
2015-06-12 10:10 ` Sudeep Holla
2015-06-12 10:42 ` Krzysztof Kozlowski
2015-06-12 10:42 ` Krzysztof Kozlowski
2015-06-12 10:56 ` Sudeep Holla
2015-06-12 10:56 ` Sudeep Holla
2015-06-12 11:27 ` Javier Martinez Canillas
2015-06-12 11:27 ` Javier Martinez Canillas
2015-06-12 11:54 ` Sudeep Holla
2015-06-12 11:54 ` Sudeep Holla
2015-06-12 12:57 ` Javier Martinez Canillas
2015-06-12 12:57 ` Javier Martinez Canillas
2015-06-12 19:36 ` Javier Martinez Canillas
2015-06-12 19:36 ` Javier Martinez Canillas
2015-06-12 20:17 ` Doug Anderson
2015-06-12 20:17 ` Doug Anderson
2015-06-15 7:46 ` Javier Martinez Canillas
2015-06-15 7:46 ` Javier Martinez Canillas
2015-06-15 9:01 ` Sudeep Holla
2015-06-15 9:01 ` Sudeep Holla
2015-06-15 15:00 ` Javier Martinez Canillas [this message]
2015-06-15 15:00 ` Javier Martinez Canillas
2015-06-15 15:08 ` Sudeep Holla
2015-06-15 15:08 ` Sudeep Holla
2015-06-15 15:23 ` Javier Martinez Canillas
2015-06-15 15:23 ` Javier Martinez Canillas
2015-06-15 23:57 ` Krzysztof Kozlowski
2015-06-15 23:57 ` Krzysztof Kozlowski
2015-06-16 3:19 ` Javier Martinez Canillas
2015-06-16 3:19 ` Javier Martinez Canillas
2015-06-16 8:21 ` Thomas Gleixner
2015-06-16 8:21 ` Thomas Gleixner
2015-06-16 12:32 ` Tomasz Figa
2015-06-16 12:32 ` Tomasz Figa
2015-06-16 13:11 ` Sudeep Holla
2015-06-16 13:11 ` Sudeep Holla
2015-06-15 8:52 ` Sudeep Holla
2015-06-15 8:52 ` Sudeep Holla
2015-06-16 9:36 ` [tip:irq/core] " tip-bot for Javier Martinez Canillas
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