Re: [PATCH 1/2] arm64: dts: mediatek: mt7622: set PHY address of MT7531 switch to 0x1f

From: Florian Fainelli <f.fainelli@gmail.com>
To: "Arınç ÜNAL" <arinc.unal@arinc9.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>
Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org
Subject: Re: [PATCH 1/2] arm64: dts: mediatek: mt7622: set PHY address of MT7531 switch to 0x1f
Date: Mon, 18 Mar 2024 06:02:06 -0700	[thread overview]
Message-ID: <71dd200a-0306-4baa-abab-6e6906aeef2a@gmail.com> (raw)
In-Reply-To: <62d128f1-11ac-4669-90ff-e9cdd0ec5bd9@arinc9.com>


On 3/16/2024 12:43 AM, Arınç ÜNAL wrote:
> On 15.03.2024 20:26, Florian Fainelli wrote:
>> On 3/14/24 05:20, Arınç ÜNAL via B4 Relay wrote:
>>> From: Arınç ÜNAL <arinc.unal@arinc9.com>
>>>
>>> The MT7531 switch listens on PHY address 0x1f on an MDIO bus. I've 
>>> got two
>>> findings that support this. There's no bootstrapping option to change 
>>> the
>>> PHY address of the switch. The Linux driver hardcodes 0x1f as the PHY
>>> address of the switch. So the reg property on the device tree is 
>>> currently
>>> ignored by the Linux driver.
>>>
>>> Therefore, describe the correct PHY address on boards that have this
>>> switch.
>>
>> Can we call it a pseudo PHY to use a similar terminology as what is 
>> done through drivers/net/dsa/{bcm_sf2,b53}*?
>>
>> This is not a real PHY as in it has no actual transceiver/digital 
>> signal processing logic, this is a piece of logic that snoops for MDIO 
>> transactions at that specific address and lets you access the switch's 
>> internal register as if it was a MDIO device.
> 
> I can get behind calling the switch a psuedo-PHY in the context of MDIO.
> However, as described on "22.2.4.5.5 PHYAD (PHY Address)" of "22.2.4.5
> Management frame structure" of the active standard IEEE Std 802.3™‐2022,
> the field is called "PHY Address". The patch log doesn't give an identifier
> as to what a switch is in the context of MDIO. Only that it listens on a
> certain PHY address which the term complies with IEEE Std 802.3™‐2022.
> 
> So I don't see an improvement to be made on the patch log. Feel free to
> elaborate further.

I would just s/PHY/MDIO bus address/ since that is simply more generic, 
but if it is not written as-is in the spec, then I won't fight it much 
more than I already did.
-- 
Florian