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From: Alexandre Ghiti <alex@ghiti.fr>
To: "Charlie Jenkins" <charlie@rivosinc.com>,
	"Conor Dooley" <conor@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Guo Ren" <guoren@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Samuel Holland" <samuel@sholland.org>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Evan Green" <evan@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Shuah Khan" <shuah@kernel.org>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Palmer Dabbelt <palmer@rivosinc.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v3 06/17] riscv: Fix extension subset checking
Date: Wed, 24 Apr 2024 16:22:02 +0200	[thread overview]
Message-ID: <6c624361-a968-498b-a9fb-ea2aaec70ce8@ghiti.fr> (raw)
In-Reply-To: <20240420-dev-charlie-support_thead_vector_6_9-v3-6-67cff4271d1d@rivosinc.com>

Hi Charlie,

On 21/04/2024 03:04, Charlie Jenkins wrote:
> This loop is supposed to check if ext->subset_ext_ids[j] is valid, rather
> than if ext->subset_ext_ids[i] is valid, before setting the extension
> id ext->subset_ext_ids[j] in isainfo->isa.
>
> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Fixes: 0d8295ed975b ("riscv: add ISA extension parsing for scalar crypto")
> ---
>   arch/riscv/kernel/cpufeature.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 48874aac4871..b537731cadef 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -609,7 +609,7 @@ static int __init riscv_fill_hwcap_from_ext_list(unsigned long *isa2hwcap)
>   
>   			if (ext->subset_ext_size) {
>   				for (int j = 0; j < ext->subset_ext_size; j++) {
> -					if (riscv_isa_extension_check(ext->subset_ext_ids[i]))
> +					if (riscv_isa_extension_check(ext->subset_ext_ids[j]))
>   						set_bit(ext->subset_ext_ids[j], isainfo->isa);
>   				}
>   			}
>

I think this should go into -fixes, let's check with Palmer if he wants 
to take this patch only or if you should send the patch on its own.

You can add:

Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>

Thanks,

Alex



WARNING: multiple messages have this Message-ID (diff)
From: Alexandre Ghiti <alex@ghiti.fr>
To: "Charlie Jenkins" <charlie@rivosinc.com>,
	"Conor Dooley" <conor@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Guo Ren" <guoren@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Samuel Holland" <samuel@sholland.org>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Evan Green" <evan@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Shuah Khan" <shuah@kernel.org>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Palmer Dabbelt <palmer@rivosinc.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v3 06/17] riscv: Fix extension subset checking
Date: Wed, 24 Apr 2024 16:22:02 +0200	[thread overview]
Message-ID: <6c624361-a968-498b-a9fb-ea2aaec70ce8@ghiti.fr> (raw)
In-Reply-To: <20240420-dev-charlie-support_thead_vector_6_9-v3-6-67cff4271d1d@rivosinc.com>

Hi Charlie,

On 21/04/2024 03:04, Charlie Jenkins wrote:
> This loop is supposed to check if ext->subset_ext_ids[j] is valid, rather
> than if ext->subset_ext_ids[i] is valid, before setting the extension
> id ext->subset_ext_ids[j] in isainfo->isa.
>
> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Fixes: 0d8295ed975b ("riscv: add ISA extension parsing for scalar crypto")
> ---
>   arch/riscv/kernel/cpufeature.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 48874aac4871..b537731cadef 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -609,7 +609,7 @@ static int __init riscv_fill_hwcap_from_ext_list(unsigned long *isa2hwcap)
>   
>   			if (ext->subset_ext_size) {
>   				for (int j = 0; j < ext->subset_ext_size; j++) {
> -					if (riscv_isa_extension_check(ext->subset_ext_ids[i]))
> +					if (riscv_isa_extension_check(ext->subset_ext_ids[j]))
>   						set_bit(ext->subset_ext_ids[j], isainfo->isa);
>   				}
>   			}
>

I think this should go into -fixes, let's check with Palmer if he wants 
to take this patch only or if you should send the patch on its own.

You can add:

Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>

Thanks,

Alex



_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Alexandre Ghiti <alex@ghiti.fr>
To: "Charlie Jenkins" <charlie@rivosinc.com>,
	"Conor Dooley" <conor@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Guo Ren" <guoren@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Samuel Holland" <samuel@sholland.org>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Evan Green" <evan@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Shuah Khan" <shuah@kernel.org>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Palmer Dabbelt <palmer@rivosinc.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v3 06/17] riscv: Fix extension subset checking
Date: Wed, 24 Apr 2024 16:22:02 +0200	[thread overview]
Message-ID: <6c624361-a968-498b-a9fb-ea2aaec70ce8@ghiti.fr> (raw)
In-Reply-To: <20240420-dev-charlie-support_thead_vector_6_9-v3-6-67cff4271d1d@rivosinc.com>

Hi Charlie,

On 21/04/2024 03:04, Charlie Jenkins wrote:
> This loop is supposed to check if ext->subset_ext_ids[j] is valid, rather
> than if ext->subset_ext_ids[i] is valid, before setting the extension
> id ext->subset_ext_ids[j] in isainfo->isa.
>
> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Fixes: 0d8295ed975b ("riscv: add ISA extension parsing for scalar crypto")
> ---
>   arch/riscv/kernel/cpufeature.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 48874aac4871..b537731cadef 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -609,7 +609,7 @@ static int __init riscv_fill_hwcap_from_ext_list(unsigned long *isa2hwcap)
>   
>   			if (ext->subset_ext_size) {
>   				for (int j = 0; j < ext->subset_ext_size; j++) {
> -					if (riscv_isa_extension_check(ext->subset_ext_ids[i]))
> +					if (riscv_isa_extension_check(ext->subset_ext_ids[j]))
>   						set_bit(ext->subset_ext_ids[j], isainfo->isa);
>   				}
>   			}
>

I think this should go into -fixes, let's check with Palmer if he wants 
to take this patch only or if you should send the patch on its own.

You can add:

Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>

Thanks,

Alex



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2024-04-24 14:22 UTC|newest]

Thread overview: 105+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-21  1:04 [PATCH v3 00/17] riscv: Support vendor extensions and xtheadvector Charlie Jenkins
2024-04-21  1:04 ` Charlie Jenkins
2024-04-21  1:04 ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 01/17] riscv: cpufeature: Fix thead vector hwcap removal Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-26  8:15   ` Guo Ren
2024-04-26  8:15     ` Guo Ren
2024-04-26  8:15     ` Guo Ren
2024-04-21  1:04 ` [PATCH v3 02/17] dt-bindings: riscv: Add xtheadvector ISA extension description Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 03/17] dt-bindings: riscv: cpus: add a vlen register length property Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 04/17] riscv: vector: Use vlenb from DT Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-26 15:17   ` Conor Dooley
2024-04-26 15:17     ` Conor Dooley
2024-04-26 15:17     ` Conor Dooley
2024-04-26 16:21     ` Conor Dooley
2024-04-26 16:21       ` Conor Dooley
2024-04-26 16:21       ` Conor Dooley
2024-04-26 17:03       ` Charlie Jenkins
2024-04-26 17:03         ` Charlie Jenkins
2024-04-26 17:03         ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 05/17] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 06/17] riscv: Fix extension subset checking Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-24 14:22   ` Alexandre Ghiti [this message]
2024-04-24 14:22     ` Alexandre Ghiti
2024-04-24 14:22     ` Alexandre Ghiti
2024-04-24 14:51     ` Conor Dooley
2024-04-24 14:51       ` Conor Dooley
2024-04-24 14:51       ` Conor Dooley
2024-04-24 15:13       ` Charlie Jenkins
2024-04-24 15:13         ` Charlie Jenkins
2024-04-24 15:13         ` Charlie Jenkins
2024-04-24 15:21         ` Conor Dooley
2024-04-24 15:21           ` Conor Dooley
2024-04-24 15:21           ` Conor Dooley
2024-04-24 15:36           ` Charlie Jenkins
2024-04-24 15:36             ` Charlie Jenkins
2024-04-24 15:36             ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 07/17] riscv: Extend cpufeature.c to detect vendor extensions Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-26 16:00   ` Conor Dooley
2024-04-26 16:00     ` Conor Dooley
2024-04-26 16:00     ` Conor Dooley
2024-04-26 18:00     ` Charlie Jenkins
2024-04-26 18:00       ` Charlie Jenkins
2024-04-26 18:00       ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 08/17] riscv: Introduce vendor variants of extension helpers Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-26 16:19   ` Conor Dooley
2024-04-26 16:19     ` Conor Dooley
2024-04-26 16:19     ` Conor Dooley
2024-04-26 20:01     ` Charlie Jenkins
2024-04-26 20:01       ` Charlie Jenkins
2024-04-26 20:01       ` Charlie Jenkins
2024-04-26 20:37       ` Conor Dooley
2024-04-26 20:37         ` Conor Dooley
2024-04-26 20:37         ` Conor Dooley
2024-04-21  1:04 ` [PATCH v3 09/17] riscv: drivers: Convert xandespmu to use the vendor extension framework Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-26 16:25   ` Conor Dooley
2024-04-26 16:25     ` Conor Dooley
2024-04-26 16:25     ` Conor Dooley
2024-04-26 20:34     ` Charlie Jenkins
2024-04-26 20:34       ` Charlie Jenkins
2024-04-26 20:34       ` Charlie Jenkins
2024-04-26 20:46       ` Conor Dooley
2024-04-26 20:46         ` Conor Dooley
2024-04-26 20:46         ` Conor Dooley
2024-04-21  1:04 ` [PATCH v3 10/17] RISC-V: define the elements of the VCSR vector CSR Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 11/17] riscv: csr: Add CSR encodings for VCSR_VXRM/VCSR_VXSAT Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 12/17] riscv: Add xtheadvector instruction definitions Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 13/17] riscv: vector: Support xtheadvector save/restore Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 14/17] riscv: hwprobe: Add thead vendor extension probing Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 15/17] riscv: hwprobe: Document thead vendor extensions and xtheadvector extension Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 16/17] selftests: riscv: Fix vector tests Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04 ` [PATCH v3 17/17] selftests: riscv: Support xtheadvector in " Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins
2024-04-21  1:04   ` Charlie Jenkins

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