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From: Atish Patra <atishp@rivosinc.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: linux-kernel@vger.kernel.org, Anup Patel <anup@brainfault.org>,
	Ajay Kaher <akaher@vmware.com>,
	Alexandre Ghiti <alexghiti@rivosinc.com>,
	Alexey Makhalov <amakhalov@vmware.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Juergen Gross <jgross@suse.com>,
	kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
	linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Shuah Khan <shuah@kernel.org>,
	virtualization@lists.linux.dev,
	VMware PV-Drivers Reviewers <pv-drivers@vmware.com>,
	Will Deacon <will@kernel.org>,
	x86@kernel.org
Subject: Re: [PATCH v5 12/22] RISC-V: KVM: Implement SBI PMU Snapshot feature
Date: Mon, 8 Apr 2024 17:33:10 -0700	[thread overview]
Message-ID: <a50d426c-a7c0-49d9-8bdf-d15ba53ba40f@rivosinc.com> (raw)
In-Reply-To: <20240405-1060c986299eaac3528c7d4f@orel>

On 4/5/24 04:23, Andrew Jones wrote:
> On Wed, Apr 03, 2024 at 01:04:41AM -0700, Atish Patra wrote:
>> PMU Snapshot function allows to minimize the number of traps when the
>> guest access configures/access the hpmcounters. If the snapshot feature
>> is enabled, the hypervisor updates the shared memory with counter
>> data and state of overflown counters. The guest can just read the
>> shared memory instead of trap & emulate done by the hypervisor.
>>
>> This patch doesn't implement the counter overflow yet.
>>
>> Reviewed-by: Anup Patel <anup@brainfault.org>
>> Signed-off-by: Atish Patra <atishp@rivosinc.com>
>> ---
>>   arch/riscv/include/asm/kvm_vcpu_pmu.h |   7 ++
>>   arch/riscv/kvm/vcpu_pmu.c             | 121 +++++++++++++++++++++++++-
>>   arch/riscv/kvm/vcpu_sbi_pmu.c         |   3 +
>>   3 files changed, 130 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/riscv/include/asm/kvm_vcpu_pmu.h b/arch/riscv/include/asm/kvm_vcpu_pmu.h
>> index 395518a1664e..77a1fc4d203d 100644
>> --- a/arch/riscv/include/asm/kvm_vcpu_pmu.h
>> +++ b/arch/riscv/include/asm/kvm_vcpu_pmu.h
>> @@ -50,6 +50,10 @@ struct kvm_pmu {
>>   	bool init_done;
>>   	/* Bit map of all the virtual counter used */
>>   	DECLARE_BITMAP(pmc_in_use, RISCV_KVM_MAX_COUNTERS);
>> +	/* The address of the counter snapshot area (guest physical address) */
>> +	gpa_t snapshot_addr;
>> +	/* The actual data of the snapshot */
>> +	struct riscv_pmu_snapshot_data *sdata;
>>   };
>>   
>>   #define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu_context)
>> @@ -85,6 +89,9 @@ int kvm_riscv_vcpu_pmu_ctr_cfg_match(struct kvm_vcpu *vcpu, unsigned long ctr_ba
>>   int kvm_riscv_vcpu_pmu_ctr_read(struct kvm_vcpu *vcpu, unsigned long cidx,
>>   				struct kvm_vcpu_sbi_return *retdata);
>>   void kvm_riscv_vcpu_pmu_init(struct kvm_vcpu *vcpu);
>> +int kvm_riscv_vcpu_pmu_snapshot_set_shmem(struct kvm_vcpu *vcpu, unsigned long saddr_low,
>> +				      unsigned long saddr_high, unsigned long flags,
>> +				      struct kvm_vcpu_sbi_return *retdata);
>>   void kvm_riscv_vcpu_pmu_deinit(struct kvm_vcpu *vcpu);
>>   void kvm_riscv_vcpu_pmu_reset(struct kvm_vcpu *vcpu);
>>   
>> diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c
>> index 2d9929bbc2c8..f706c688b338 100644
>> --- a/arch/riscv/kvm/vcpu_pmu.c
>> +++ b/arch/riscv/kvm/vcpu_pmu.c
>> @@ -14,6 +14,7 @@
>>   #include <asm/csr.h>
>>   #include <asm/kvm_vcpu_sbi.h>
>>   #include <asm/kvm_vcpu_pmu.h>
>> +#include <asm/sbi.h>
>>   #include <linux/bitops.h>
>>   
>>   #define kvm_pmu_num_counters(pmu) ((pmu)->num_hw_ctrs + (pmu)->num_fw_ctrs)
>> @@ -311,6 +312,80 @@ int kvm_riscv_vcpu_pmu_read_hpm(struct kvm_vcpu *vcpu, unsigned int csr_num,
>>   	return ret;
>>   }
>>   
>> +static void kvm_pmu_clear_snapshot_area(struct kvm_vcpu *vcpu)
>> +{
>> +	struct kvm_pmu *kvpmu = vcpu_to_pmu(vcpu);
>> +	int snapshot_area_size = sizeof(struct riscv_pmu_snapshot_data);
>> +
>> +	if (kvpmu->sdata) {
>> +		if (kvpmu->snapshot_addr != INVALID_GPA) {
>> +			memset(kvpmu->sdata, 0, snapshot_area_size);
>> +			kvm_vcpu_write_guest(vcpu, kvpmu->snapshot_addr,
>> +					     kvpmu->sdata, snapshot_area_size);
>> +		} else {
>> +			pr_warn("snapshot address invalid\n");
>> +		}
>> +		kfree(kvpmu->sdata);
>> +		kvpmu->sdata = NULL;
>> +	}
>> +	kvpmu->snapshot_addr = INVALID_GPA;
>> +}
>> +
>> +int kvm_riscv_vcpu_pmu_snapshot_set_shmem(struct kvm_vcpu *vcpu, unsigned long saddr_low,
>> +				      unsigned long saddr_high, unsigned long flags,
>> +				      struct kvm_vcpu_sbi_return *retdata)
>> +{
>> +	struct kvm_pmu *kvpmu = vcpu_to_pmu(vcpu);
>> +	int snapshot_area_size = sizeof(struct riscv_pmu_snapshot_data);
>> +	int sbiret = 0;
>> +	gpa_t saddr;
>> +	unsigned long hva;
>> +	bool writable;
>> +
>> +	if (!kvpmu || flags) {
>> +		sbiret = SBI_ERR_INVALID_PARAM;
>> +		goto out;
>> +	}
>> +
>> +	if (saddr_low == SBI_SHMEM_DISABLE && saddr_high == SBI_SHMEM_DISABLE) {
>> +		kvm_pmu_clear_snapshot_area(vcpu);
>> +		return 0;
>> +	}
>> +
>> +	saddr = saddr_low;
>> +
>> +	if (saddr_high != 0) {
>> +		if (IS_ENABLED(CONFIG_32BIT))
>> +			saddr |= ((gpa_t)saddr << 32);
> 
> saddr |= ((gpa_t)saddr_high << 32)
> 

Oops. Thanks for catching it. Fixed.


>> +		else
>> +			sbiret = SBI_ERR_INVALID_ADDRESS;
>> +		goto out;
>> +	}
>> +
> 
> Thanks,
> drew


WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atishp@rivosinc.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: linux-kernel@vger.kernel.org, Anup Patel <anup@brainfault.org>,
	Ajay Kaher <akaher@vmware.com>,
	Alexandre Ghiti <alexghiti@rivosinc.com>,
	Alexey Makhalov <amakhalov@vmware.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Juergen Gross <jgross@suse.com>,
	kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
	linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Shuah Khan <shuah@kernel.org>,
	virtualization@lists.linux.dev,
	VMware PV-Drivers Reviewers <pv-drivers@vmware.com>,
	Will Deacon <will@kernel.org>,
	x86@kernel.org
Subject: Re: [PATCH v5 12/22] RISC-V: KVM: Implement SBI PMU Snapshot feature
Date: Mon, 8 Apr 2024 17:33:10 -0700	[thread overview]
Message-ID: <a50d426c-a7c0-49d9-8bdf-d15ba53ba40f@rivosinc.com> (raw)
In-Reply-To: <20240405-1060c986299eaac3528c7d4f@orel>

On 4/5/24 04:23, Andrew Jones wrote:
> On Wed, Apr 03, 2024 at 01:04:41AM -0700, Atish Patra wrote:
>> PMU Snapshot function allows to minimize the number of traps when the
>> guest access configures/access the hpmcounters. If the snapshot feature
>> is enabled, the hypervisor updates the shared memory with counter
>> data and state of overflown counters. The guest can just read the
>> shared memory instead of trap & emulate done by the hypervisor.
>>
>> This patch doesn't implement the counter overflow yet.
>>
>> Reviewed-by: Anup Patel <anup@brainfault.org>
>> Signed-off-by: Atish Patra <atishp@rivosinc.com>
>> ---
>>   arch/riscv/include/asm/kvm_vcpu_pmu.h |   7 ++
>>   arch/riscv/kvm/vcpu_pmu.c             | 121 +++++++++++++++++++++++++-
>>   arch/riscv/kvm/vcpu_sbi_pmu.c         |   3 +
>>   3 files changed, 130 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/riscv/include/asm/kvm_vcpu_pmu.h b/arch/riscv/include/asm/kvm_vcpu_pmu.h
>> index 395518a1664e..77a1fc4d203d 100644
>> --- a/arch/riscv/include/asm/kvm_vcpu_pmu.h
>> +++ b/arch/riscv/include/asm/kvm_vcpu_pmu.h
>> @@ -50,6 +50,10 @@ struct kvm_pmu {
>>   	bool init_done;
>>   	/* Bit map of all the virtual counter used */
>>   	DECLARE_BITMAP(pmc_in_use, RISCV_KVM_MAX_COUNTERS);
>> +	/* The address of the counter snapshot area (guest physical address) */
>> +	gpa_t snapshot_addr;
>> +	/* The actual data of the snapshot */
>> +	struct riscv_pmu_snapshot_data *sdata;
>>   };
>>   
>>   #define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu_context)
>> @@ -85,6 +89,9 @@ int kvm_riscv_vcpu_pmu_ctr_cfg_match(struct kvm_vcpu *vcpu, unsigned long ctr_ba
>>   int kvm_riscv_vcpu_pmu_ctr_read(struct kvm_vcpu *vcpu, unsigned long cidx,
>>   				struct kvm_vcpu_sbi_return *retdata);
>>   void kvm_riscv_vcpu_pmu_init(struct kvm_vcpu *vcpu);
>> +int kvm_riscv_vcpu_pmu_snapshot_set_shmem(struct kvm_vcpu *vcpu, unsigned long saddr_low,
>> +				      unsigned long saddr_high, unsigned long flags,
>> +				      struct kvm_vcpu_sbi_return *retdata);
>>   void kvm_riscv_vcpu_pmu_deinit(struct kvm_vcpu *vcpu);
>>   void kvm_riscv_vcpu_pmu_reset(struct kvm_vcpu *vcpu);
>>   
>> diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c
>> index 2d9929bbc2c8..f706c688b338 100644
>> --- a/arch/riscv/kvm/vcpu_pmu.c
>> +++ b/arch/riscv/kvm/vcpu_pmu.c
>> @@ -14,6 +14,7 @@
>>   #include <asm/csr.h>
>>   #include <asm/kvm_vcpu_sbi.h>
>>   #include <asm/kvm_vcpu_pmu.h>
>> +#include <asm/sbi.h>
>>   #include <linux/bitops.h>
>>   
>>   #define kvm_pmu_num_counters(pmu) ((pmu)->num_hw_ctrs + (pmu)->num_fw_ctrs)
>> @@ -311,6 +312,80 @@ int kvm_riscv_vcpu_pmu_read_hpm(struct kvm_vcpu *vcpu, unsigned int csr_num,
>>   	return ret;
>>   }
>>   
>> +static void kvm_pmu_clear_snapshot_area(struct kvm_vcpu *vcpu)
>> +{
>> +	struct kvm_pmu *kvpmu = vcpu_to_pmu(vcpu);
>> +	int snapshot_area_size = sizeof(struct riscv_pmu_snapshot_data);
>> +
>> +	if (kvpmu->sdata) {
>> +		if (kvpmu->snapshot_addr != INVALID_GPA) {
>> +			memset(kvpmu->sdata, 0, snapshot_area_size);
>> +			kvm_vcpu_write_guest(vcpu, kvpmu->snapshot_addr,
>> +					     kvpmu->sdata, snapshot_area_size);
>> +		} else {
>> +			pr_warn("snapshot address invalid\n");
>> +		}
>> +		kfree(kvpmu->sdata);
>> +		kvpmu->sdata = NULL;
>> +	}
>> +	kvpmu->snapshot_addr = INVALID_GPA;
>> +}
>> +
>> +int kvm_riscv_vcpu_pmu_snapshot_set_shmem(struct kvm_vcpu *vcpu, unsigned long saddr_low,
>> +				      unsigned long saddr_high, unsigned long flags,
>> +				      struct kvm_vcpu_sbi_return *retdata)
>> +{
>> +	struct kvm_pmu *kvpmu = vcpu_to_pmu(vcpu);
>> +	int snapshot_area_size = sizeof(struct riscv_pmu_snapshot_data);
>> +	int sbiret = 0;
>> +	gpa_t saddr;
>> +	unsigned long hva;
>> +	bool writable;
>> +
>> +	if (!kvpmu || flags) {
>> +		sbiret = SBI_ERR_INVALID_PARAM;
>> +		goto out;
>> +	}
>> +
>> +	if (saddr_low == SBI_SHMEM_DISABLE && saddr_high == SBI_SHMEM_DISABLE) {
>> +		kvm_pmu_clear_snapshot_area(vcpu);
>> +		return 0;
>> +	}
>> +
>> +	saddr = saddr_low;
>> +
>> +	if (saddr_high != 0) {
>> +		if (IS_ENABLED(CONFIG_32BIT))
>> +			saddr |= ((gpa_t)saddr << 32);
> 
> saddr |= ((gpa_t)saddr_high << 32)
> 

Oops. Thanks for catching it. Fixed.


>> +		else
>> +			sbiret = SBI_ERR_INVALID_ADDRESS;
>> +		goto out;
>> +	}
>> +
> 
> Thanks,
> drew


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linux-riscv@lists.infradead.org
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  reply	other threads:[~2024-04-09  0:33 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-03  8:04 [PATCH v5 00/22] RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest Atish Patra
2024-04-03  8:04 ` Atish Patra
2024-04-03  8:04 ` [PATCH v5 01/22] RISC-V: Fix the typo in Scountovf CSR name Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 10:56   ` Andrew Jones
2024-04-04 10:56     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 02/22] RISC-V: Add FIRMWARE_READ_HI definition Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 10:57   ` Andrew Jones
2024-04-04 10:57     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 03/22] drivers/perf: riscv: Read upper bits of a firmware counter Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 11:02   ` Andrew Jones
2024-04-04 11:02     ` Andrew Jones
2024-04-09  0:04     ` Atish Patra
2024-04-09  0:04       ` Atish Patra
2024-04-03  8:04 ` [PATCH v5 04/22] drivers/perf: riscv: Use BIT macro for shifting operations Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-03 15:57   ` unsubscribe jonathan.oleson
2024-04-04 11:08   ` [PATCH v5 04/22] drivers/perf: riscv: Use BIT macro for shifting operations Andrew Jones
2024-04-04 11:08     ` Andrew Jones
2024-04-09  0:20     ` Atish Patra
2024-04-09  0:20       ` Atish Patra
2024-04-03  8:04 ` [PATCH v5 05/22] RISC-V: Add SBI PMU snapshot definitions Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 11:14   ` Andrew Jones
2024-04-04 11:14     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 06/22] drivers/perf: riscv: Implement SBI PMU snapshot function Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 11:52   ` Andrew Jones
2024-04-04 11:52     ` Andrew Jones
2024-04-10 22:29     ` Atish Patra
2024-04-10 22:29       ` Atish Patra
2024-04-11  7:45       ` Andrew Jones
2024-04-11  7:45         ` Andrew Jones
2024-04-04 12:01   ` Andrew Jones
2024-04-04 12:01     ` Andrew Jones
2024-04-09  0:21     ` Atish Patra
2024-04-09  0:21       ` Atish Patra
2024-04-03  8:04 ` [PATCH v5 07/22] drivers/perf: riscv: Fix counter mask iteration for RV32 Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 11:55   ` Andrew Jones
2024-04-04 11:55     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 08/22] RISC-V: KVM: Fix the initial sample period value Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 11:57   ` Andrew Jones
2024-04-04 11:57     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 09/22] RISC-V: KVM: Rename the SBI_STA_SHMEM_DISABLE to a generic name Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 11:59   ` Andrew Jones
2024-04-04 11:59     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 10/22] RISC-V: KVM: No need to update the counter value during reset Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-03  8:04 ` [PATCH v5 11/22] RISC-V: KVM: No need to exit to the user space if perf event failed Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-04 12:19   ` Andrew Jones
2024-04-04 12:19     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 12/22] RISC-V: KVM: Implement SBI PMU Snapshot feature Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 11:23   ` Andrew Jones
2024-04-05 11:23     ` Andrew Jones
2024-04-09  0:33     ` Atish Patra [this message]
2024-04-09  0:33       ` Atish Patra
2024-04-03  8:04 ` [PATCH v5 13/22] RISC-V: KVM: Add perf sampling support for guests Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 11:36   ` Andrew Jones
2024-04-05 11:36     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 14/22] RISC-V: KVM: Support 64 bit firmware counters on RV32 Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 12:10   ` Andrew Jones
2024-04-05 12:10     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 15/22] RISC-V: KVM: Improve firmware counter read function Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 12:12   ` Andrew Jones
2024-04-05 12:12     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 16/22] KVM: riscv: selftests: Move sbi definitions to its own header file Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 12:16   ` Andrew Jones
2024-04-05 12:16     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 17/22] KVM: riscv: selftests: Add helper functions for extension checks Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 12:17   ` Andrew Jones
2024-04-05 12:17     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 18/22] KVM: riscv: selftests: Add Sscofpmf to get-reg-list test Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-03  8:04 ` [PATCH v5 19/22] KVM: riscv: selftests: Add SBI PMU extension definitions Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 12:20   ` Andrew Jones
2024-04-05 12:20     ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 20/22] KVM: riscv: selftests: Add SBI PMU selftest Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 12:50   ` Andrew Jones
2024-04-05 12:50     ` Andrew Jones
2024-04-09  0:37     ` Atish Patra
2024-04-09  0:37       ` Atish Patra
2024-04-09  8:01       ` Andrew Jones
2024-04-09  8:01         ` Andrew Jones
2024-04-09 22:11         ` Atish Kumar Patra
2024-04-09 22:11           ` Atish Kumar Patra
2024-04-03  8:04 ` [PATCH v5 21/22] KVM: riscv: selftests: Add a test for PMU snapshot functionality Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 13:11   ` Andrew Jones
2024-04-05 13:11     ` Andrew Jones
2024-04-09 22:52     ` Atish Patra
2024-04-09 22:52       ` Atish Patra
2024-04-10  7:10       ` Andrew Jones
2024-04-10  7:10         ` Andrew Jones
2024-04-10  7:28         ` Atish Patra
2024-04-10  7:28           ` Atish Patra
2024-04-10  7:54           ` Andrew Jones
2024-04-10  7:54             ` Andrew Jones
2024-04-03  8:04 ` [PATCH v5 22/22] KVM: riscv: selftests: Add a test for counter overflow Atish Patra
2024-04-03  8:04   ` Atish Patra
2024-04-05 13:23   ` Andrew Jones
2024-04-05 13:23     ` Andrew Jones
2024-04-09 23:47     ` Atish Patra
2024-04-09 23:47       ` Atish Patra

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