From: Markos Chandras <markos.chandras@imgtec.com>
To: <linux-mips@linux-mips.org>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Subject: [PATCH 00/19] Initial I6400 and CM3 support
Date: Thu, 9 Jul 2015 10:40:34 +0100 [thread overview]
Message-ID: <1436434853-30001-1-git-send-email-markos.chandras@imgtec.com> (raw)
Hi,
This patchset adds support for I6400 processor along with the new
Coherent Manager 3.
More information about the I-Class Warrior family can be found below:
http://www.imgtec.com/mips/warrior/iclass.asp
Markos Chandras (15):
MIPS: Add MIPS I6400 PRid and cputype identifiers
MIPS: Add cases for CPU_I6400
MIPS: Add MIPS I6400 probe support
MIPS: Kconfig: Disable MIPS MT and SMP implementations for R6
MIPS: Add platform callback before initializing the L2 cache
MIPS: asm: mips-cm: Extend CM accessors for 64-bit CPUs
MIPS: kernel: mips-cm: The CMGCRBase register is 64-bit on MIPS64
MIPS: kernel: mips-cpc: Fix type for GCR CPC base reg for 64-bit
MIPS: kernel: mips-cm: Add support for reporting CM cache errors
drivers: irqchip: irq-mips-gic: Extend GIC accessors for 64-bit CMs
drivers: irqchip: irq-mips-gic: Add support for CM3 64-bit timer irqs
MIPS: kernel: cpu-probe: Remove cp0 hazard barrier when enabling the
FTLB
MIPS: Add default case for the FTLB enable/disable code
MIPS: kernel: cpu-probe: Fix VTLB/FTLB configuration for R6
MIPS: Set up FTLB probability for I6400
Paul Burton (4):
MIPS: asm: mips-cm: Implement mips_cm_revision
MIPS: asm: add CM GCR_L2_CONFIG register accessors
MIPS: mm: c-r4k: extend way_string array
MIPS: support CM3 L2 cache
arch/mips/Kconfig | 6 +-
arch/mips/include/asm/cpu-type.h | 4 +
arch/mips/include/asm/cpu.h | 2 +
arch/mips/include/asm/mips-cm.h | 97 ++++++++++++-
arch/mips/include/asm/mipsregs.h | 2 +
arch/mips/kernel/cpu-probe.c | 47 +++++--
arch/mips/kernel/idle.c | 1 +
arch/mips/kernel/mips-cm.c | 257 ++++++++++++++++++++++++++++++++++-
arch/mips/kernel/mips-cpc.c | 2 +-
arch/mips/kernel/perf_event_mipsxx.c | 6 +
arch/mips/kernel/pm-cps.c | 2 +
arch/mips/kernel/spram.c | 1 +
arch/mips/kernel/traps.c | 1 +
arch/mips/mm/c-r4k.c | 5 +-
arch/mips/mm/sc-mips.c | 42 ++++++
arch/mips/mti-malta/malta-init.c | 7 +
arch/mips/mti-malta/malta-int.c | 112 +--------------
arch/mips/oprofile/common.c | 1 +
arch/mips/oprofile/op_model_mipsxx.c | 4 +
drivers/irqchip/irq-mips-gic.c | 140 ++++++++++++-------
include/linux/irqchip/mips-gic.h | 14 +-
21 files changed, 573 insertions(+), 180 deletions(-)
--
2.4.5
WARNING: multiple messages have this Message-ID (diff)
From: Markos Chandras <markos.chandras@imgtec.com>
To: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Subject: [PATCH 00/19] Initial I6400 and CM3 support
Date: Thu, 9 Jul 2015 10:40:34 +0100 [thread overview]
Message-ID: <1436434853-30001-1-git-send-email-markos.chandras@imgtec.com> (raw)
Message-ID: <20150709094034.dYJJ5DoVnT_SS1CIbduMjFOCFSunRnvbegtCEJ6AjTE@z> (raw)
Hi,
This patchset adds support for I6400 processor along with the new
Coherent Manager 3.
More information about the I-Class Warrior family can be found below:
http://www.imgtec.com/mips/warrior/iclass.asp
Markos Chandras (15):
MIPS: Add MIPS I6400 PRid and cputype identifiers
MIPS: Add cases for CPU_I6400
MIPS: Add MIPS I6400 probe support
MIPS: Kconfig: Disable MIPS MT and SMP implementations for R6
MIPS: Add platform callback before initializing the L2 cache
MIPS: asm: mips-cm: Extend CM accessors for 64-bit CPUs
MIPS: kernel: mips-cm: The CMGCRBase register is 64-bit on MIPS64
MIPS: kernel: mips-cpc: Fix type for GCR CPC base reg for 64-bit
MIPS: kernel: mips-cm: Add support for reporting CM cache errors
drivers: irqchip: irq-mips-gic: Extend GIC accessors for 64-bit CMs
drivers: irqchip: irq-mips-gic: Add support for CM3 64-bit timer irqs
MIPS: kernel: cpu-probe: Remove cp0 hazard barrier when enabling the
FTLB
MIPS: Add default case for the FTLB enable/disable code
MIPS: kernel: cpu-probe: Fix VTLB/FTLB configuration for R6
MIPS: Set up FTLB probability for I6400
Paul Burton (4):
MIPS: asm: mips-cm: Implement mips_cm_revision
MIPS: asm: add CM GCR_L2_CONFIG register accessors
MIPS: mm: c-r4k: extend way_string array
MIPS: support CM3 L2 cache
arch/mips/Kconfig | 6 +-
arch/mips/include/asm/cpu-type.h | 4 +
arch/mips/include/asm/cpu.h | 2 +
arch/mips/include/asm/mips-cm.h | 97 ++++++++++++-
arch/mips/include/asm/mipsregs.h | 2 +
arch/mips/kernel/cpu-probe.c | 47 +++++--
arch/mips/kernel/idle.c | 1 +
arch/mips/kernel/mips-cm.c | 257 ++++++++++++++++++++++++++++++++++-
arch/mips/kernel/mips-cpc.c | 2 +-
arch/mips/kernel/perf_event_mipsxx.c | 6 +
arch/mips/kernel/pm-cps.c | 2 +
arch/mips/kernel/spram.c | 1 +
arch/mips/kernel/traps.c | 1 +
arch/mips/mm/c-r4k.c | 5 +-
arch/mips/mm/sc-mips.c | 42 ++++++
arch/mips/mti-malta/malta-init.c | 7 +
arch/mips/mti-malta/malta-int.c | 112 +--------------
arch/mips/oprofile/common.c | 1 +
arch/mips/oprofile/op_model_mipsxx.c | 4 +
drivers/irqchip/irq-mips-gic.c | 140 ++++++++++++-------
include/linux/irqchip/mips-gic.h | 14 +-
21 files changed, 573 insertions(+), 180 deletions(-)
--
2.4.5
next reply other threads:[~2015-07-09 9:41 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 9:40 Markos Chandras [this message]
2015-07-09 9:40 ` [PATCH 00/19] Initial I6400 and CM3 support Markos Chandras
2015-07-09 9:40 ` [PATCH 01/19] MIPS: Add MIPS I6400 PRid and cputype identifiers Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 02/19] MIPS: Add cases for CPU_I6400 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 10:03 ` Ralf Baechle
2015-07-09 10:14 ` Markos Chandras
2015-07-09 10:14 ` Markos Chandras
2015-07-09 11:43 ` Ralf Baechle
2015-07-09 9:40 ` [PATCH 03/19] MIPS: Add MIPS I6400 probe support Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 04/19] MIPS: Kconfig: Disable MIPS MT and SMP implementations for R6 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 05/19] MIPS: asm: mips-cm: Implement mips_cm_revision Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 11:09 ` Sergei Shtylyov
2015-07-09 16:05 ` Markos Chandras
2015-07-09 16:05 ` Markos Chandras
2015-07-09 11:29 ` James Hogan
2015-07-09 11:29 ` James Hogan
2015-07-09 16:05 ` Markos Chandras
2015-07-09 16:05 ` Markos Chandras
2015-07-10 9:12 ` [PATCH v2 " Markos Chandras
2015-07-10 9:12 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 06/19] MIPS: asm: add CM GCR_L2_CONFIG register accessors Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 07/19] MIPS: mm: c-r4k: extend way_string array Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 08/19] MIPS: support CM3 L2 cache Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 09/19] MIPS: Add platform callback before initializing the " Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 10/19] MIPS: asm: mips-cm: Extend CM accessors for 64-bit CPUs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-14 8:14 ` [PATCH v2 " Markos Chandras
2015-07-14 8:14 ` Markos Chandras
2015-07-14 8:30 ` Paul Burton
2015-07-14 8:30 ` Paul Burton
2015-07-14 8:35 ` Paul Burton
2015-07-14 8:35 ` Paul Burton
2015-07-14 8:45 ` Markos Chandras
2015-07-14 8:45 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 11/19] MIPS: kernel: mips-cm: The CMGCRBase register is 64-bit on MIPS64 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 12/19] MIPS: kernel: mips-cpc: Fix type for GCR CPC base reg for 64-bit Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 13/19] MIPS: kernel: mips-cm: Add support for reporting CM cache errors Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 14/19] drivers: irqchip: irq-mips-gic: Extend GIC accessors for 64-bit CMs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-14 9:26 ` [PATCH v2 " Markos Chandras
2015-07-14 9:26 ` Markos Chandras
2015-07-14 11:57 ` Jonas Gorski
2015-07-14 12:21 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 15/19] drivers: irqchip: irq-mips-gic: Add support for CM3 64-bit timer irqs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 16/19] MIPS: kernel: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 17/19] MIPS: Add default case for the FTLB enable/disable code Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 18/19] MIPS: kernel: cpu-probe: Fix VTLB/FTLB configuration for R6 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 19/19] MIPS: Set up FTLB probability for I6400 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
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