From: Markos Chandras <markos.chandras@imgtec.com>
To: <linux-mips@linux-mips.org>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Subject: [PATCH 17/19] MIPS: Add default case for the FTLB enable/disable code
Date: Thu, 9 Jul 2015 10:40:51 +0100 [thread overview]
Message-ID: <1436434853-30001-18-git-send-email-markos.chandras@imgtec.com> (raw)
In-Reply-To: <1436434853-30001-1-git-send-email-markos.chandras@imgtec.com>
Add a default case for the FTLB enable/disable code. This will be used
to detect that something went wrong in the set_ftlb_enable() function
either because that function knows nothing about the running core, or
simply because the core can't turn its FTLB on/off.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
arch/mips/kernel/cpu-probe.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index dc057f37305b..6da5f2db6792 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -188,7 +188,7 @@ __setup("nohtw", htw_disable);
static int mips_ftlb_disabled;
static int mips_has_ftlb_configured;
-static void set_ftlb_enable(struct cpuinfo_mips *c, int enable);
+static int set_ftlb_enable(struct cpuinfo_mips *c, int enable);
static int __init ftlb_disable(char *s)
{
@@ -202,7 +202,10 @@ static int __init ftlb_disable(char *s)
return 1;
/* Disable it in the boot cpu */
- set_ftlb_enable(&cpu_data[0], 0);
+ if (set_ftlb_enable(&cpu_data[0], 0)) {
+ pr_warn("Can't turn FTLB off\n");
+ return 1;
+ }
back_to_back_c0_hazard();
@@ -364,7 +367,7 @@ static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c)
return 3;
}
-static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
+static int set_ftlb_enable(struct cpuinfo_mips *c, int enable)
{
unsigned int config6;
@@ -386,7 +389,11 @@ static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
/* Disable FTLB */
write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN);
break;
+ default:
+ return 1;
}
+
+ return 0;
}
static inline unsigned int decode_config0(struct cpuinfo_mips *c)
--
2.4.5
WARNING: multiple messages have this Message-ID (diff)
From: Markos Chandras <markos.chandras@imgtec.com>
To: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Subject: [PATCH 17/19] MIPS: Add default case for the FTLB enable/disable code
Date: Thu, 9 Jul 2015 10:40:51 +0100 [thread overview]
Message-ID: <1436434853-30001-18-git-send-email-markos.chandras@imgtec.com> (raw)
Message-ID: <20150709094051.zDgipLIM4AIYmvT3SssBrBT6aNj3zXPQjBhYB-3LetY@z> (raw)
In-Reply-To: <1436434853-30001-1-git-send-email-markos.chandras@imgtec.com>
Add a default case for the FTLB enable/disable code. This will be used
to detect that something went wrong in the set_ftlb_enable() function
either because that function knows nothing about the running core, or
simply because the core can't turn its FTLB on/off.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
arch/mips/kernel/cpu-probe.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index dc057f37305b..6da5f2db6792 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -188,7 +188,7 @@ __setup("nohtw", htw_disable);
static int mips_ftlb_disabled;
static int mips_has_ftlb_configured;
-static void set_ftlb_enable(struct cpuinfo_mips *c, int enable);
+static int set_ftlb_enable(struct cpuinfo_mips *c, int enable);
static int __init ftlb_disable(char *s)
{
@@ -202,7 +202,10 @@ static int __init ftlb_disable(char *s)
return 1;
/* Disable it in the boot cpu */
- set_ftlb_enable(&cpu_data[0], 0);
+ if (set_ftlb_enable(&cpu_data[0], 0)) {
+ pr_warn("Can't turn FTLB off\n");
+ return 1;
+ }
back_to_back_c0_hazard();
@@ -364,7 +367,7 @@ static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c)
return 3;
}
-static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
+static int set_ftlb_enable(struct cpuinfo_mips *c, int enable)
{
unsigned int config6;
@@ -386,7 +389,11 @@ static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
/* Disable FTLB */
write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN);
break;
+ default:
+ return 1;
}
+
+ return 0;
}
static inline unsigned int decode_config0(struct cpuinfo_mips *c)
--
2.4.5
next prev parent reply other threads:[~2015-07-09 9:46 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 9:40 [PATCH 00/19] Initial I6400 and CM3 support Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 01/19] MIPS: Add MIPS I6400 PRid and cputype identifiers Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 02/19] MIPS: Add cases for CPU_I6400 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 10:03 ` Ralf Baechle
2015-07-09 10:14 ` Markos Chandras
2015-07-09 10:14 ` Markos Chandras
2015-07-09 11:43 ` Ralf Baechle
2015-07-09 9:40 ` [PATCH 03/19] MIPS: Add MIPS I6400 probe support Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 04/19] MIPS: Kconfig: Disable MIPS MT and SMP implementations for R6 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 05/19] MIPS: asm: mips-cm: Implement mips_cm_revision Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 11:09 ` Sergei Shtylyov
2015-07-09 16:05 ` Markos Chandras
2015-07-09 16:05 ` Markos Chandras
2015-07-09 11:29 ` James Hogan
2015-07-09 11:29 ` James Hogan
2015-07-09 16:05 ` Markos Chandras
2015-07-09 16:05 ` Markos Chandras
2015-07-10 9:12 ` [PATCH v2 " Markos Chandras
2015-07-10 9:12 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 06/19] MIPS: asm: add CM GCR_L2_CONFIG register accessors Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 07/19] MIPS: mm: c-r4k: extend way_string array Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 08/19] MIPS: support CM3 L2 cache Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 09/19] MIPS: Add platform callback before initializing the " Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 10/19] MIPS: asm: mips-cm: Extend CM accessors for 64-bit CPUs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-14 8:14 ` [PATCH v2 " Markos Chandras
2015-07-14 8:14 ` Markos Chandras
2015-07-14 8:30 ` Paul Burton
2015-07-14 8:30 ` Paul Burton
2015-07-14 8:35 ` Paul Burton
2015-07-14 8:35 ` Paul Burton
2015-07-14 8:45 ` Markos Chandras
2015-07-14 8:45 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 11/19] MIPS: kernel: mips-cm: The CMGCRBase register is 64-bit on MIPS64 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 12/19] MIPS: kernel: mips-cpc: Fix type for GCR CPC base reg for 64-bit Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 13/19] MIPS: kernel: mips-cm: Add support for reporting CM cache errors Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 14/19] drivers: irqchip: irq-mips-gic: Extend GIC accessors for 64-bit CMs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-14 9:26 ` [PATCH v2 " Markos Chandras
2015-07-14 9:26 ` Markos Chandras
2015-07-14 11:57 ` Jonas Gorski
2015-07-14 12:21 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 15/19] drivers: irqchip: irq-mips-gic: Add support for CM3 64-bit timer irqs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 16/19] MIPS: kernel: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` Markos Chandras [this message]
2015-07-09 9:40 ` [PATCH 17/19] MIPS: Add default case for the FTLB enable/disable code Markos Chandras
2015-07-09 9:40 ` [PATCH 18/19] MIPS: kernel: cpu-probe: Fix VTLB/FTLB configuration for R6 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 19/19] MIPS: Set up FTLB probability for I6400 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
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