From: Paul Burton <paul.burton@imgtec.com>
To: Markos Chandras <markos.chandras@imgtec.com>
Cc: <linux-mips@linux-mips.org>, Thomas Gleixner <tglx@linutronix.de>,
"Jason Cooper" <jason@lakedaemon.net>,
Andrew Bresticker <abrestic@chromium.org>
Subject: Re: [PATCH v2 10/19] MIPS: asm: mips-cm: Extend CM accessors for 64-bit CPUs
Date: Tue, 14 Jul 2015 09:35:39 +0100 [thread overview]
Message-ID: <20150714083539.GF2519@NP-P-BURTON> (raw)
In-Reply-To: <20150714083019.GD2519@NP-P-BURTON>
On Tue, Jul 14, 2015 at 09:30:19AM +0100, Paul Burton wrote:
> On Tue, Jul 14, 2015 at 09:14:12AM +0100, Markos Chandras wrote:
> > Previously, the CM accessors were only accessing CM registers as u32
> > types instead of using the native CM register with. However, newer CMs
> > may actually be 64-bit on MIPS64 cores. Fortunately, current 64-bit CMs
> > (CM3) hold all the useful configuration bits in the lower half of the
> > 64-bit registers (at least most of them) so they can still be accessed
> > using the current 32-bit accessors.
> >
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: Jason Cooper <jason@lakedaemon.net>
> > Cc: Andrew Bresticker <abrestic@chromium.org>
> > Cc: Paul Burton <paul.burton@imgtec.com>
> > Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> > ---
> > Changes since v1
> > - Use 32-bit CM I/O on 32-bit kernels
>
> A concern I have, but haven't yet drank enough coffee to think through
> fully, is whether this will work on big endian systems. These are 64b
> addresses and you're writing 32b to their addresses which I suspect may
> go horribly wrong.
Should be:
"These are 64b registers and you're writing 32b to their addresses"
Apparently I haven't drunk enouugh coffee to formulate sentences yet
either ;)
Thanks,
Paul
WARNING: multiple messages have this Message-ID (diff)
From: Paul Burton <paul.burton@imgtec.com>
To: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org, Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Andrew Bresticker <abrestic@chromium.org>
Subject: Re: [PATCH v2 10/19] MIPS: asm: mips-cm: Extend CM accessors for 64-bit CPUs
Date: Tue, 14 Jul 2015 09:35:39 +0100 [thread overview]
Message-ID: <20150714083539.GF2519@NP-P-BURTON> (raw)
Message-ID: <20150714083539.k_UA2uVBeBj9gA_bM-62yU-WKRSoRG2y8AkeOfLCnto@z> (raw)
In-Reply-To: <20150714083019.GD2519@NP-P-BURTON>
On Tue, Jul 14, 2015 at 09:30:19AM +0100, Paul Burton wrote:
> On Tue, Jul 14, 2015 at 09:14:12AM +0100, Markos Chandras wrote:
> > Previously, the CM accessors were only accessing CM registers as u32
> > types instead of using the native CM register with. However, newer CMs
> > may actually be 64-bit on MIPS64 cores. Fortunately, current 64-bit CMs
> > (CM3) hold all the useful configuration bits in the lower half of the
> > 64-bit registers (at least most of them) so they can still be accessed
> > using the current 32-bit accessors.
> >
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: Jason Cooper <jason@lakedaemon.net>
> > Cc: Andrew Bresticker <abrestic@chromium.org>
> > Cc: Paul Burton <paul.burton@imgtec.com>
> > Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> > ---
> > Changes since v1
> > - Use 32-bit CM I/O on 32-bit kernels
>
> A concern I have, but haven't yet drank enough coffee to think through
> fully, is whether this will work on big endian systems. These are 64b
> addresses and you're writing 32b to their addresses which I suspect may
> go horribly wrong.
Should be:
"These are 64b registers and you're writing 32b to their addresses"
Apparently I haven't drunk enouugh coffee to formulate sentences yet
either ;)
Thanks,
Paul
next prev parent reply other threads:[~2015-07-14 8:35 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 9:40 [PATCH 00/19] Initial I6400 and CM3 support Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 01/19] MIPS: Add MIPS I6400 PRid and cputype identifiers Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 02/19] MIPS: Add cases for CPU_I6400 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 10:03 ` Ralf Baechle
2015-07-09 10:14 ` Markos Chandras
2015-07-09 10:14 ` Markos Chandras
2015-07-09 11:43 ` Ralf Baechle
2015-07-09 9:40 ` [PATCH 03/19] MIPS: Add MIPS I6400 probe support Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 04/19] MIPS: Kconfig: Disable MIPS MT and SMP implementations for R6 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 05/19] MIPS: asm: mips-cm: Implement mips_cm_revision Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 11:09 ` Sergei Shtylyov
2015-07-09 16:05 ` Markos Chandras
2015-07-09 16:05 ` Markos Chandras
2015-07-09 11:29 ` James Hogan
2015-07-09 11:29 ` James Hogan
2015-07-09 16:05 ` Markos Chandras
2015-07-09 16:05 ` Markos Chandras
2015-07-10 9:12 ` [PATCH v2 " Markos Chandras
2015-07-10 9:12 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 06/19] MIPS: asm: add CM GCR_L2_CONFIG register accessors Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 07/19] MIPS: mm: c-r4k: extend way_string array Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 08/19] MIPS: support CM3 L2 cache Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 09/19] MIPS: Add platform callback before initializing the " Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 10/19] MIPS: asm: mips-cm: Extend CM accessors for 64-bit CPUs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-14 8:14 ` [PATCH v2 " Markos Chandras
2015-07-14 8:14 ` Markos Chandras
2015-07-14 8:30 ` Paul Burton
2015-07-14 8:30 ` Paul Burton
2015-07-14 8:35 ` Paul Burton [this message]
2015-07-14 8:35 ` Paul Burton
2015-07-14 8:45 ` Markos Chandras
2015-07-14 8:45 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 11/19] MIPS: kernel: mips-cm: The CMGCRBase register is 64-bit on MIPS64 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 12/19] MIPS: kernel: mips-cpc: Fix type for GCR CPC base reg for 64-bit Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 13/19] MIPS: kernel: mips-cm: Add support for reporting CM cache errors Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 14/19] drivers: irqchip: irq-mips-gic: Extend GIC accessors for 64-bit CMs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-14 9:26 ` [PATCH v2 " Markos Chandras
2015-07-14 9:26 ` Markos Chandras
2015-07-14 11:57 ` Jonas Gorski
2015-07-14 12:21 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 15/19] drivers: irqchip: irq-mips-gic: Add support for CM3 64-bit timer irqs Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 16/19] MIPS: kernel: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 17/19] MIPS: Add default case for the FTLB enable/disable code Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 18/19] MIPS: kernel: cpu-probe: Fix VTLB/FTLB configuration for R6 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
2015-07-09 9:40 ` [PATCH 19/19] MIPS: Set up FTLB probability for I6400 Markos Chandras
2015-07-09 9:40 ` Markos Chandras
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