From: Mike Looijmans <mike.looijmans@topic.nl>
To: Ranjit Waghmode <ranjit.waghmode@xilinx.com>,
<broonie@kernel.org>, <michal.simek@xilinx.com>,
<soren.brinkmann@xilinx.com>, <dwmw2@infradead.org>,
<computersforpeace@gmail.com>, <zajec5@gmail.com>,
<marex@denx.de>, <shijie.huang@intel.com>, <juhosg@openwrt.org>,
<ben@decadent.org.uk>
Cc: <harinik@xilinx.com>, <linux-kernel@vger.kernel.org>,
<linux-spi@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
<punnaia@xilinx.com>, <ran27jit@gmail.com>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller
Date: Fri, 10 Jul 2015 10:28:59 +0200 [thread overview]
Message-ID: <559F824B.70409@topic.nl> (raw)
In-Reply-To: <1436445895-25504-1-git-send-email-ranjit.waghmode@xilinx.com>
On 09-07-15 14:44, Ranjit Waghmode wrote:
> This series of patches is to add dual parallel and stacked mode support for
> Zynq Ultrascale+ MPSoC GQSPI controller driver.
>
> These are all very high level changes and expected to make an idea clear.
> Comments and suggestions are welcomed.
>
...
>
> What is stacked mode?
> ---------------------
> ZynqMP GQSPI controller supports stacked mode with following functionalities:
> 1) The Generic Quad-SPI controller also supports two SPI flash memories
> in a shared bus arrangement to reduce IO pin count.
> 2) Separate chip select lines
> 3) Shared I/O lines
> 4) This mode is targeted for increasing the flash memory and no performance
> improvement when compared with single.
One could also model the stacked mode as having two distinct flash chips with
separate chip selects and shared lines.
Merging them into a single storage device can be done on block layer or higher
level. This allows the flash chips to be used in any configuration using
existing support for concatenating multiple devices.
I think this would be a more generic way of doing this. It also allows much
more flexibility, for example the devices could be used in a mirror setup, or
in combination with additional devices on other controllers.
Kind regards,
Mike Looijmans
System Expert
TOPIC Embedded Products
Eindhovenseweg 32-C, NL-5683 KH Best
Postbus 440, NL-5680 AK Best
Telefoon: +31 (0) 499 33 69 79
Telefax: +31 (0) 499 33 69 70
E-mail: mike.looijmans@topicproducts.com
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WARNING: multiple messages have this Message-ID (diff)
From: mike.looijmans@topic.nl (Mike Looijmans)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller
Date: Fri, 10 Jul 2015 10:28:59 +0200 [thread overview]
Message-ID: <559F824B.70409@topic.nl> (raw)
In-Reply-To: <1436445895-25504-1-git-send-email-ranjit.waghmode@xilinx.com>
?On 09-07-15 14:44, Ranjit Waghmode wrote:
> This series of patches is to add dual parallel and stacked mode support for
> Zynq Ultrascale+ MPSoC GQSPI controller driver.
>
> These are all very high level changes and expected to make an idea clear.
> Comments and suggestions are welcomed.
>
...
>
> What is stacked mode?
> ---------------------
> ZynqMP GQSPI controller supports stacked mode with following functionalities:
> 1) The Generic Quad-SPI controller also supports two SPI flash memories
> in a shared bus arrangement to reduce IO pin count.
> 2) Separate chip select lines
> 3) Shared I/O lines
> 4) This mode is targeted for increasing the flash memory and no performance
> improvement when compared with single.
One could also model the stacked mode as having two distinct flash chips with
separate chip selects and shared lines.
Merging them into a single storage device can be done on block layer or higher
level. This allows the flash chips to be used in any configuration using
existing support for concatenating multiple devices.
I think this would be a more generic way of doing this. It also allows much
more flexibility, for example the devices could be used in a mirror setup, or
in combination with additional devices on other controllers.
Kind regards,
Mike Looijmans
System Expert
TOPIC Embedded Products
Eindhovenseweg 32-C, NL-5683 KH Best
Postbus 440, NL-5680 AK Best
Telefoon: +31 (0) 499 33 69 79
Telefax: +31 (0) 499 33 69 70
E-mail: mike.looijmans at topicproducts.com
Website: www.topicproducts.com
Please consider the environment before printing this e-mail
next prev parent reply other threads:[~2015-07-10 8:30 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 12:44 [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller Ranjit Waghmode
2015-07-09 12:44 ` Ranjit Waghmode
2015-07-09 12:44 ` Ranjit Waghmode
2015-07-09 12:44 ` [RFC PATCH 1/2] spi: zynqmp: gqspi: add support for dual parallel mode configuration Ranjit Waghmode
2015-07-09 12:44 ` Ranjit Waghmode
2015-07-09 12:44 ` Ranjit Waghmode
2015-07-14 16:26 ` Mark Brown
2015-07-14 16:26 ` Mark Brown
2015-07-14 16:26 ` Mark Brown
2015-07-09 12:44 ` [RFC PATCH 2/2] spi: zynqmp: gqspi: add support for stacked " Ranjit Waghmode
2015-07-09 12:44 ` Ranjit Waghmode
2015-07-09 12:44 ` Ranjit Waghmode
2015-07-14 16:28 ` Mark Brown
2015-07-14 16:28 ` Mark Brown
2015-07-14 16:28 ` Mark Brown
2015-07-10 8:28 ` Mike Looijmans [this message]
2015-07-10 8:28 ` [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller Mike Looijmans
2015-07-13 14:59 ` Mark Brown
2015-07-13 14:59 ` Mark Brown
2015-07-13 14:59 ` Mark Brown
2015-07-13 10:04 ` Thomas.Betker
2015-07-13 10:04 ` Thomas.Betker
2015-07-13 10:04 ` Thomas.Betker at rohde-schwarz.com
2015-07-14 4:24 ` Harini Katakam
2015-07-14 4:24 ` Harini Katakam
2015-07-14 4:24 ` Harini Katakam
2015-07-14 16:40 ` Mark Brown
2015-07-14 16:40 ` Mark Brown
2015-07-14 16:40 ` Mark Brown
2015-07-15 14:12 ` Ranjit Abhimanyu Waghmode
2015-07-15 14:12 ` Ranjit Abhimanyu Waghmode
2015-07-15 14:12 ` Ranjit Abhimanyu Waghmode
2015-07-15 16:01 ` Mark Brown
2015-07-15 16:01 ` Mark Brown
2015-07-15 16:01 ` Mark Brown
2015-07-16 7:27 ` Ranjit Abhimanyu Waghmode
2015-07-16 7:27 ` Ranjit Abhimanyu Waghmode
2015-07-16 7:27 ` Ranjit Abhimanyu Waghmode
2015-07-16 8:57 ` Mark Brown
2015-07-16 8:57 ` Mark Brown
2015-07-17 12:03 ` Ranjit Abhimanyu Waghmode
2015-07-17 12:03 ` Ranjit Abhimanyu Waghmode
2015-07-17 12:03 ` Ranjit Abhimanyu Waghmode
2015-07-24 10:42 ` Ranjit Abhimanyu Waghmode
2015-07-24 10:42 ` Ranjit Abhimanyu Waghmode
2015-07-24 10:52 ` Mark Brown
2015-07-24 10:52 ` Mark Brown
2015-07-27 13:55 ` Ranjit Abhimanyu Waghmode
2015-07-27 13:55 ` Ranjit Abhimanyu Waghmode
2015-07-27 13:55 ` Ranjit Abhimanyu Waghmode
2015-07-27 14:23 ` Mark Brown
2015-07-27 14:23 ` Mark Brown
2015-07-27 14:23 ` Mark Brown
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