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From: Ranjit Abhimanyu Waghmode <ranjit.waghmode@xilinx.com>
To: Mark Brown <broonie@kernel.org>
Cc: Michal Simek <michals@xilinx.com>,
	Soren Brinkmann <sorenb@xilinx.com>,
	"dwmw2@infradead.org" <dwmw2@infradead.org>,
	"computersforpeace@gmail.com" <computersforpeace@gmail.com>,
	"zajec5@gmail.com" <zajec5@gmail.com>,
	"marex@denx.de" <marex@denx.de>,
	"shijie.huang@intel.com" <shijie.huang@intel.com>,
	"juhosg@openwrt.org" <juhosg@openwrt.org>,
	"ben@decadent.org.uk" <ben@decadent.org.uk>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Harini Katakam <harinik@xilinx.com>,
	"Punnaiah Choudary Kalluri" <punnaia@xilinx.com>,
	"ran27jit@gmail.com" <ran27jit@gmail.com>
Subject: RE: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller
Date: Thu, 16 Jul 2015 07:27:34 +0000	[thread overview]
Message-ID: <7CFCFE83B8145347A1D424EC939F1C3CA7E758@XAP-PVEXMBX01.xlnx.xilinx.com> (raw)
In-Reply-To: <20150715160146.GS11162@sirena.org.uk>

Hi Mark,

> > > > What is stacked mode?
> > > > ---------------------
> > > > ZynqMP GQSPI controller supports stacked mode with following
> > > functionalities:
> > > > 1) The Generic Quad-SPI controller also supports two SPI flash memories
> > > >    in a shared bus arrangement to reduce IO pin count.
> > > > 2) Separate chip select lines
> > > > 3) Shared I/O lines
> > > > 4) This mode is targeted for increasing the flash memory and no
> performance
> > > >    improvement when compared with single.
> 
> > > This is just a normal SPI controller from a SPI point of view.
> 
> > How can we really represent the stacked mode in current configuration?
> 
> In the same way as any other controller with two chip selects...  there are quite
> a few other drivers that provide examples of this, you should look for one that
> has hardware control similar to yours.

Thanks Mark for your suggestion. But I have minor doubts.

For an example take two flashes connected in stacked mode.
For user it doesn't matter whether how many flashes are really connected. 
There will be situation like, single partition is spread across two flashes (partition staring at the end of one flash and continued to the second flash). But it has to be shown contiguous to user.
In this scenario, I am not clear how MTD layer will handle the case.
It would be great if you could just put some light on it.

Regards,
Ranjit

WARNING: multiple messages have this Message-ID (diff)
From: ranjit.waghmode@xilinx.com (Ranjit Abhimanyu Waghmode)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller
Date: Thu, 16 Jul 2015 07:27:34 +0000	[thread overview]
Message-ID: <7CFCFE83B8145347A1D424EC939F1C3CA7E758@XAP-PVEXMBX01.xlnx.xilinx.com> (raw)
In-Reply-To: <20150715160146.GS11162@sirena.org.uk>

Hi Mark,

> > > > What is stacked mode?
> > > > ---------------------
> > > > ZynqMP GQSPI controller supports stacked mode with following
> > > functionalities:
> > > > 1) The Generic Quad-SPI controller also supports two SPI flash memories
> > > >    in a shared bus arrangement to reduce IO pin count.
> > > > 2) Separate chip select lines
> > > > 3) Shared I/O lines
> > > > 4) This mode is targeted for increasing the flash memory and no
> performance
> > > >    improvement when compared with single.
> 
> > > This is just a normal SPI controller from a SPI point of view.
> 
> > How can we really represent the stacked mode in current configuration?
> 
> In the same way as any other controller with two chip selects...  there are quite
> a few other drivers that provide examples of this, you should look for one that
> has hardware control similar to yours.

Thanks Mark for your suggestion. But I have minor doubts.

For an example take two flashes connected in stacked mode.
For user it doesn't matter whether how many flashes are really connected. 
There will be situation like, single partition is spread across two flashes (partition staring at the end of one flash and continued to the second flash). But it has to be shown contiguous to user.
In this scenario, I am not clear how MTD layer will handle the case.
It would be great if you could just put some light on it.

Regards,
Ranjit

WARNING: multiple messages have this Message-ID (diff)
From: Ranjit Abhimanyu Waghmode <ranjit.waghmode-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
To: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Michal Simek <michals-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	Soren Brinkmann <sorenb-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	"dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org"
	<dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
	"computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org"
	<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org"
	<zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"marex-ynQEQJNshbs@public.gmane.org"
	<marex-ynQEQJNshbs@public.gmane.org>,
	"shijie.huang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org"
	<shijie.huang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	"juhosg-p3rKhJxN3npAfugRpC6u6w@public.gmane.org"
	<juhosg-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>,
	"ben-/+tVBieCtBitmTQ+vhA3Yw@public.gmane.org"
	<ben-/+tVBieCtBitmTQ+vhA3Yw@public.gmane.org>,
	"linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Harini Katakam <harinik-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	"Punnaiah Choudary Kalluri"
	<punnaia-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	"ran27jit-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org"
	<ran27jit-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: RE: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller
Date: Thu, 16 Jul 2015 07:27:34 +0000	[thread overview]
Message-ID: <7CFCFE83B8145347A1D424EC939F1C3CA7E758@XAP-PVEXMBX01.xlnx.xilinx.com> (raw)
In-Reply-To: <20150715160146.GS11162-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>

Hi Mark,

> > > > What is stacked mode?
> > > > ---------------------
> > > > ZynqMP GQSPI controller supports stacked mode with following
> > > functionalities:
> > > > 1) The Generic Quad-SPI controller also supports two SPI flash memories
> > > >    in a shared bus arrangement to reduce IO pin count.
> > > > 2) Separate chip select lines
> > > > 3) Shared I/O lines
> > > > 4) This mode is targeted for increasing the flash memory and no
> performance
> > > >    improvement when compared with single.
> 
> > > This is just a normal SPI controller from a SPI point of view.
> 
> > How can we really represent the stacked mode in current configuration?
> 
> In the same way as any other controller with two chip selects...  there are quite
> a few other drivers that provide examples of this, you should look for one that
> has hardware control similar to yours.

Thanks Mark for your suggestion. But I have minor doubts.

For an example take two flashes connected in stacked mode.
For user it doesn't matter whether how many flashes are really connected. 
There will be situation like, single partition is spread across two flashes (partition staring at the end of one flash and continued to the second flash). But it has to be shown contiguous to user.
In this scenario, I am not clear how MTD layer will handle the case.
It would be great if you could just put some light on it.

Regards,
Ranjit
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  reply	other threads:[~2015-07-16  7:27 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-09 12:44 [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller Ranjit Waghmode
2015-07-09 12:44 ` Ranjit Waghmode
2015-07-09 12:44 ` Ranjit Waghmode
2015-07-09 12:44 ` [RFC PATCH 1/2] spi: zynqmp: gqspi: add support for dual parallel mode configuration Ranjit Waghmode
2015-07-09 12:44   ` Ranjit Waghmode
2015-07-09 12:44   ` Ranjit Waghmode
2015-07-14 16:26   ` Mark Brown
2015-07-14 16:26     ` Mark Brown
2015-07-14 16:26     ` Mark Brown
2015-07-09 12:44 ` [RFC PATCH 2/2] spi: zynqmp: gqspi: add support for stacked " Ranjit Waghmode
2015-07-09 12:44   ` Ranjit Waghmode
2015-07-09 12:44   ` Ranjit Waghmode
2015-07-14 16:28   ` Mark Brown
2015-07-14 16:28     ` Mark Brown
2015-07-14 16:28     ` Mark Brown
2015-07-10  8:28 ` [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in Zynq MPSoC GQSPI controller Mike Looijmans
2015-07-10  8:28   ` Mike Looijmans
2015-07-13 14:59   ` Mark Brown
2015-07-13 14:59     ` Mark Brown
2015-07-13 14:59     ` Mark Brown
2015-07-13 10:04 ` Thomas.Betker
2015-07-13 10:04   ` Thomas.Betker
2015-07-13 10:04   ` Thomas.Betker at rohde-schwarz.com
2015-07-14  4:24   ` Harini Katakam
2015-07-14  4:24     ` Harini Katakam
2015-07-14  4:24     ` Harini Katakam
2015-07-14 16:40 ` Mark Brown
2015-07-14 16:40   ` Mark Brown
2015-07-14 16:40   ` Mark Brown
2015-07-15 14:12   ` Ranjit Abhimanyu Waghmode
2015-07-15 14:12     ` Ranjit Abhimanyu Waghmode
2015-07-15 14:12     ` Ranjit Abhimanyu Waghmode
2015-07-15 16:01     ` Mark Brown
2015-07-15 16:01       ` Mark Brown
2015-07-15 16:01       ` Mark Brown
2015-07-16  7:27       ` Ranjit Abhimanyu Waghmode [this message]
2015-07-16  7:27         ` Ranjit Abhimanyu Waghmode
2015-07-16  7:27         ` Ranjit Abhimanyu Waghmode
2015-07-16  8:57         ` Mark Brown
2015-07-16  8:57           ` Mark Brown
2015-07-17 12:03           ` Ranjit Abhimanyu Waghmode
2015-07-17 12:03             ` Ranjit Abhimanyu Waghmode
2015-07-17 12:03             ` Ranjit Abhimanyu Waghmode
2015-07-24 10:42           ` Ranjit Abhimanyu Waghmode
2015-07-24 10:42             ` Ranjit Abhimanyu Waghmode
2015-07-24 10:52             ` Mark Brown
2015-07-24 10:52               ` Mark Brown
2015-07-27 13:55               ` Ranjit Abhimanyu Waghmode
2015-07-27 13:55                 ` Ranjit Abhimanyu Waghmode
2015-07-27 13:55                 ` Ranjit Abhimanyu Waghmode
2015-07-27 14:23                 ` Mark Brown
2015-07-27 14:23                   ` Mark Brown
2015-07-27 14:23                   ` Mark Brown

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